From patchwork Wed Jan 18 21:05:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 716847 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3v3fm54P0qz9t23 for ; Thu, 19 Jan 2017 08:11:33 +1100 (AEDT) Received: from localhost ([::1]:44352 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cTxVz-0006q0-7E for incoming@patchwork.ozlabs.org; Wed, 18 Jan 2017 16:11:31 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46340) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cTxQU-0002MD-JU for qemu-devel@nongnu.org; Wed, 18 Jan 2017 16:05:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cTxQQ-0006lN-IL for qemu-devel@nongnu.org; Wed, 18 Jan 2017 16:05:50 -0500 Received: from mout.kundenserver.de ([212.227.126.131]:55090) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cTxQQ-0006kV-08 for qemu-devel@nongnu.org; Wed, 18 Jan 2017 16:05:46 -0500 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue005 [212.227.15.167]) with ESMTPSA (Nemesis) id 0LwVC7-1cU2fb2ysB-018NI7; Wed, 18 Jan 2017 22:05:24 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 18 Jan 2017 22:05:16 +0100 Message-Id: <1484773521-16530-3-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1484773521-16530-1-git-send-email-laurent@vivier.eu> References: <1484773521-16530-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:mf7gAetTbYdZGKyzdcvektwufRTyf8lx9FaM6gbPi5GSM1hjHJP ehyecvkxb5ubHZip4sameLTzHEySHHRk+4epLyDzKAAxv9+ocM6eArXw2Dx/KtZoYr8qcdO 9R1sLPM7UhV9EpjDYd05uRNKbFVuz+/g6Gq2ww0+ZszfcoA3H24Ls9flvemaVQMza/1xwjn pKzsvXc7J8jYw7mVKZ1tw== X-UI-Out-Filterresults: notjunk:1; V01:K0:X6kjM74CsMg=:HwN1nkh7Ic/sEcDyphsc5S qzVOv6hUs4kdT4sXfKolh2PbBWCzQJAQtE3Dx7rrZgbhdMxOYN8KvRCPQOPLAm6jSHD9J13EX ax7O5s+YuXyPPrqqmaEuxMA/MLM+9X/5Tc3CcXsMjJkVrhbF47VNU6WJU/TDQ2fZNFV9xgn6e MW3NNalW8P81mJSwX/Kdm0wOzmqHdrudjPAXkHp36yZSgvUtU6VXfQPOuZM7yFB7HdAFAR0XS +snkYbPUkrLVU6hpHW7VzMSutDy45MJYcc07BLN2MUOE7IXUy1kfiIQwBuyK908g4u7KHkdyl 7jcTuq6Yrodn8qrAG2OPmWWw5mTLk+q5Sb9iM8X5D96ep2uudssL2vNVwg6C6TtosNr4ap/1O xKyaPluLPu9eRghMURI4aO+b/F+qUQQLy3Lv+i4wwYxApLrJLecKdv0oNxRiNQL4Lw7sUv0hh tz9jpbfUsVy9WlSlP/4IbPNBxj6EiC+EerjtYBIXg6JKTpUCiQbBze1J52LGPttVrH1aOSyC8 I4MvIu7g9Woyc/r9oqBS/ZOMhztupm6w3/+vsBBaj0I6uGnqUd41+sY5b3boryFph/wqxbNM1 3uGSGVMijiHaIdXOJFZ6lvoknqfTnjlGqTEq2b40X9+XOEwFqY703zPQoIGASMMRQhwmR6Kem MF8AozaZj6h0yaqE7+MKH4XEFi3MhlNsOuyl/bU0YRTdKS9d/OqYlSGG7hdd84WQgL18= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.131 Subject: [Qemu-devel] [PATCH 2/7] target-m68k: define ext_opsize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 43 ++++++++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 9f60fbc..d9ba735 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -669,6 +669,21 @@ static inline int insn_opsize(int insn) } } +static inline int ext_opsize(int ext, int pos) +{ + switch ((ext >> pos) & 7) { + case 0: return OS_LONG; + case 1: return OS_SINGLE; + case 2: return OS_EXTENDED; + case 3: return OS_PACKED; + case 4: return OS_WORD; + case 5: return OS_DOUBLE; + case 6: return OS_BYTE; + default: + g_assert_not_reached(); + } +} + /* Assign value to a register. If the width is less than the register width only the low part of the register is set. */ static void gen_partset_reg(int opsize, TCGv reg, TCGv val) @@ -4101,20 +4116,19 @@ DISAS_INSN(fpu) tmp32 = tcg_temp_new_i32(); /* fmove */ /* ??? TODO: Proper behavior on overflow. */ - switch ((ext >> 10) & 7) { - case 0: - opsize = OS_LONG; + + opsize = ext_opsize(ext, 10); + switch (opsize) { + case OS_LONG: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; - case 1: - opsize = OS_SINGLE; + case OS_SINGLE: gen_helper_f64_to_f32(tmp32, cpu_env, src); break; - case 4: - opsize = OS_WORD; + case OS_WORD: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; - case 5: /* OS_DOUBLE */ + case OS_DOUBLE: tcg_gen_mov_i32(tmp32, AREG(insn, 0)); switch ((insn >> 3) & 7) { case 2: @@ -4143,8 +4157,7 @@ DISAS_INSN(fpu) } tcg_temp_free_i32(tmp32); return; - case 6: - opsize = OS_BYTE; + case OS_BYTE: gen_helper_f64_to_i32(tmp32, cpu_env, src); break; default: @@ -4217,15 +4230,7 @@ DISAS_INSN(fpu) } if (ext & (1 << 14)) { /* Source effective address. */ - switch ((ext >> 10) & 7) { - case 0: opsize = OS_LONG; break; - case 1: opsize = OS_SINGLE; break; - case 4: opsize = OS_WORD; break; - case 5: opsize = OS_DOUBLE; break; - case 6: opsize = OS_BYTE; break; - default: - goto undef; - } + opsize = ext_opsize(ext, 10); if (opsize == OS_DOUBLE) { tmp32 = tcg_temp_new_i32(); tcg_gen_mov_i32(tmp32, AREG(insn, 0));