From patchwork Fri Jan 13 20:48:16 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Llu=C3=ADs_Vilanova?= X-Patchwork-Id: 715250 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3v0ZW70MhRz9vDw for ; Sat, 14 Jan 2017 07:49:39 +1100 (AEDT) Received: from localhost ([::1]:45162 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cS8n2-0007z0-KI for incoming@patchwork.ozlabs.org; Fri, 13 Jan 2017 15:49:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50566) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cS8lo-0007Dp-Fa for qemu-devel@nongnu.org; Fri, 13 Jan 2017 15:48:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cS8lm-0005qO-Vr for qemu-devel@nongnu.org; Fri, 13 Jan 2017 15:48:20 -0500 Received: from roura.ac.upc.es ([147.83.33.10]:49706) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cS8lm-0005q0-JY for qemu-devel@nongnu.org; Fri, 13 Jan 2017 15:48:18 -0500 Received: from gw-3.ac.upc.es (gw-3.ac.upc.es [147.83.30.9]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v0DKmHO6027509; Fri, 13 Jan 2017 21:48:17 +0100 Received: from localhost (72.red-2-138-226.dynamicip.rima-tde.net [2.138.226.72]) by gw-3.ac.upc.es (Postfix) with ESMTPSA id DDC823D2; Fri, 13 Jan 2017 21:48:16 +0100 (CET) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Fri, 13 Jan 2017 21:48:16 +0100 Message-Id: <148434049602.31446.1147440453975767839.stgit@frigg.lan> X-Mailer: git-send-email 2.11.0 In-Reply-To: <148434048970.31446.17153056211582691244.stgit@frigg.lan> References: <148434048970.31446.17153056211582691244.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v0DKmHO6027509 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v7 1/7] exec: [tcg] Refactor flush of per-CPU virtual TB cache X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Stefan Hajnoczi , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The function is reused in later patches. Signed-off-by: Lluís Vilanova Reviewed-by: Richard Henderson --- cputlb.c | 2 +- include/exec/exec-all.h | 6 ++++++ translate-all.c | 14 +++++++++----- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/cputlb.c b/cputlb.c index 813279f3bc..9bf9960e1b 100644 --- a/cputlb.c +++ b/cputlb.c @@ -80,7 +80,7 @@ void tlb_flush(CPUState *cpu, int flush_global) memset(env->tlb_table, -1, sizeof(env->tlb_table)); memset(env->tlb_v_table, -1, sizeof(env->tlb_v_table)); - memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache)); + tb_flush_jmp_cache_all(cpu); env->vtlb_index = 0; env->tlb_flush_addr = -1; diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index a8c13cee66..57cd978578 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -256,6 +256,12 @@ struct TranslationBlock { }; void tb_free(TranslationBlock *tb); +/** + * tb_flush_jmp_cache_all: + * + * Flush the virtual translation block cache. + */ +void tb_flush_jmp_cache_all(CPUState *env); void tb_flush(CPUState *cpu); void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); diff --git a/translate-all.c b/translate-all.c index 3dd9214904..29ccb9e546 100644 --- a/translate-all.c +++ b/translate-all.c @@ -941,11 +941,7 @@ static void do_tb_flush(CPUState *cpu, run_on_cpu_data tb_flush_count) } CPU_FOREACH(cpu) { - int i; - - for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) { - atomic_set(&cpu->tb_jmp_cache[i], NULL); - } + tb_flush_jmp_cache_all(cpu); } tcg_ctx.tb_ctx.nb_tbs = 0; @@ -1741,6 +1737,14 @@ void tb_check_watchpoint(CPUState *cpu) } } +void tb_flush_jmp_cache_all(CPUState *cpu) +{ + int i; + for (i = 0; i < TB_JMP_CACHE_SIZE; ++i) { + atomic_set(&cpu->tb_jmp_cache[i], NULL); + } +} + #ifndef CONFIG_USER_ONLY /* in deterministic execution mode, instructions doing device I/Os must be at the end of the TB */