From patchwork Sat Dec 24 11:40:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 708654 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tm3VD0dXKz9t0G for ; Sat, 24 Dec 2016 22:50:28 +1100 (AEDT) Received: from localhost ([::1]:43165 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cKkqG-00075R-LZ for incoming@patchwork.ozlabs.org; Sat, 24 Dec 2016 06:50:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45397) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cKkh0-0007M0-Kf for qemu-devel@nongnu.org; Sat, 24 Dec 2016 06:40:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cKkgx-0007zK-FG for qemu-devel@nongnu.org; Sat, 24 Dec 2016 06:40:50 -0500 Received: from mout.kundenserver.de ([212.227.17.24]:63810) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cKkgx-0007yq-4Q for qemu-devel@nongnu.org; Sat, 24 Dec 2016 06:40:47 -0500 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue102 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MSao8-1cAoXZ125k-00RcUi; Sat, 24 Dec 2016 12:40:45 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Sat, 24 Dec 2016 12:40:33 +0100 Message-Id: <1482579633-3393-13-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1482579633-3393-1-git-send-email-laurent@vivier.eu> References: <1482579633-3393-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:j6U9dCPJhuTAQ5uOREeGoz7gBWrvbuxb8iuC+bXcXdfUcFlwzI4 5E+aQfBzTSHtteFjm+uATRcfLrJQYrPKwTULWvfyazZKLMbpThwW111xoS4Rzj/bmKV4SPd vgRRlCWSNlNkERzx9X8XbiGoo6Lm+BFcxoQKTFNba306TKvkX8GUn0dr4hF4e3dsUS2TyV7 vnyCZjeATab4Tg8wdHycg== X-UI-Out-Filterresults: notjunk:1; V01:K0:cLBpIOWHC5o=:pLvB3KnUBOGcjM3UnqCOBw rS2F/XSDJfJ33+oagZSqC/9QqE3WgDWqscZRlygDKjYrLuaV+Qbdds26G7HbRtqqQ6TBanVTT O73zhdt+f5uRcWR5M3CpiyjJVR9twCU3iBLKPrlA6MmMvLJl4vYSIz10pHiviWo5yKt6LCvWm qvXic6u5uf6BDvBDAuSfdBKnaoWoh6me+js5GD8fJqBM+mLhSsNPbfxrOAfcRe/VRQx7Kb4AU WkzsPWpFDMgrFA3IJKfBO0XZD0yJsCpkfyLiyxA25ETpWPblgC5PrsMQrFXBjSn9n81AbErQ5 LAQ9oRIBs6xS2nZ9W8urweqi9nO4+ONVX06Y+8ZnvDGKxWs/Tlt0CiR27XrqidTjcXaeAdoKU PsnYhJE6ScUVwwirBKf5hTmqU9LwnB5CY5kV3bcm/4h8tPYNmF8uqz4vL2FpTTrkkQh4T3EoJ 1mtXY/vpwGP0jDicvQMC20jK+yXJGg7EjQl9fZCxEPrs6AJdrtX4QNDqlJyFMr2XJUyPZ/0Tq UuoJkTWs5ld88Ja5Ui0phiRTrf0mBYjLdGnss77dYUr76L77NVien5SKbRhHs9w48arfLltSt n5jevmcLf7Rnp+Xc4uI77iEkU69lK2TmNkeKhHr8HKu8HbaG2T1+I0DC864bc5sbDtnz86kfS daamlyHXC3jj3Gml80nCifwpSSP0DWOIBKotS4A4zShaiMsMrCnI+BA+/fg3fvsiKXTg= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.24 Subject: [Qemu-devel] [PULL 12/12] target-m68k: free TCG variables that are not X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This is a cleanup patch. It adds call to tcg_temp_free() when it is missing. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/translate.c | 41 ++++++++++++++++++++++++++++++++--------- 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index bb5a299..5329317 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -679,12 +679,14 @@ static void gen_partset_reg(int opsize, TCGv reg, TCGv val) tmp = tcg_temp_new(); tcg_gen_ext8u_i32(tmp, val); tcg_gen_or_i32(reg, reg, tmp); + tcg_temp_free(tmp); break; case OS_WORD: tcg_gen_andi_i32(reg, reg, 0xffff0000); tmp = tcg_temp_new(); tcg_gen_ext16u_i32(tmp, val); tcg_gen_or_i32(reg, reg, tmp); + tcg_temp_free(tmp); break; case OS_LONG: case OS_SINGLE: @@ -1105,11 +1107,19 @@ static void gen_jmp(DisasContext *s, TCGv dest) s->is_jmp = DISAS_JUMP; } +static void gen_raise_exception(int nr) +{ + TCGv_i32 tmp = tcg_const_i32(nr); + + gen_helper_raise_exception(cpu_env, tmp); + tcg_temp_free_i32(tmp); +} + static void gen_exception(DisasContext *s, uint32_t where, int nr) { update_cc_op(s); gen_jmp_im(s, where); - gen_helper_raise_exception(cpu_env, tcg_const_i32(nr)); + gen_raise_exception(nr); } static inline void gen_addr_fault(DisasContext *s) @@ -1240,6 +1250,7 @@ DISAS_INSN(mulw) tcg_gen_mul_i32(tmp, tmp, src); tcg_gen_mov_i32(reg, tmp); gen_logic_cc(s, tmp, OS_LONG); + tcg_temp_free(tmp); } DISAS_INSN(divw) @@ -1645,6 +1656,7 @@ static void gen_push(DisasContext *s, TCGv val) tcg_gen_subi_i32(tmp, QREG_SP, 4); gen_store(s, OS_LONG, tmp, val); tcg_gen_mov_i32(QREG_SP, tmp); + tcg_temp_free(tmp); } static TCGv mreg(int reg) @@ -2135,10 +2147,14 @@ DISAS_INSN(lea) DISAS_INSN(clr) { int opsize; + TCGv zero; + + zero = tcg_const_i32(0); opsize = insn_opsize(insn); - DEST_EA(env, insn, opsize, tcg_const_i32(0), NULL); - gen_logic_cc(s, tcg_const_i32(0), opsize); + DEST_EA(env, insn, opsize, zero, NULL); + gen_logic_cc(s, zero, opsize); + tcg_temp_free(zero); } static TCGv gen_get_ccr(DisasContext *s) @@ -2244,6 +2260,8 @@ DISAS_INSN(swap) tcg_gen_shli_i32(src1, reg, 16); tcg_gen_shri_i32(src2, reg, 16); tcg_gen_or_i32(reg, src1, src2); + tcg_temp_free(src2); + tcg_temp_free(src1); gen_logic_cc(s, reg, OS_LONG); } @@ -2282,6 +2300,7 @@ DISAS_INSN(ext) else tcg_gen_mov_i32(reg, tmp); gen_logic_cc(s, tmp, OS_LONG); + tcg_temp_free(tmp); } DISAS_INSN(tst) @@ -2316,6 +2335,7 @@ DISAS_INSN(tas) gen_logic_cc(s, src1, OS_BYTE); tcg_gen_ori_i32(dest, src1, 0x80); DEST_EA(env, insn, OS_BYTE, dest, &addr); + tcg_temp_free(dest); } DISAS_INSN(mull) @@ -2423,6 +2443,7 @@ DISAS_INSN(unlk) tmp = gen_load(s, OS_LONG, src, 0); tcg_gen_mov_i32(reg, tmp); tcg_gen_addi_i32(QREG_SP, src, 4); + tcg_temp_free(src); } DISAS_INSN(nop) @@ -2499,7 +2520,9 @@ DISAS_INSN(addsubq) } gen_update_cc_add(dest, val, opsize); } + tcg_temp_free(val); DEST_EA(env, insn, opsize, dest, &addr); + tcg_temp_free(dest); } DISAS_INSN(tpf) @@ -2552,11 +2575,8 @@ DISAS_INSN(branch) DISAS_INSN(moveq) { - uint32_t val; - - val = (int8_t)insn; - tcg_gen_movi_i32(DREG(insn, 9), val); - gen_logic_cc(s, tcg_const_i32(val), OS_LONG); + tcg_gen_movi_i32(DREG(insn, 9), (int8_t)insn); + gen_logic_cc(s, DREG(insn, 9), OS_LONG); } DISAS_INSN(mvzs) @@ -2596,6 +2616,7 @@ DISAS_INSN(or) gen_partset_reg(opsize, DREG(insn, 9), dest); } gen_logic_cc(s, dest, opsize); + tcg_temp_free(dest); } DISAS_INSN(suba) @@ -2690,6 +2711,7 @@ DISAS_INSN(mov3q) src = tcg_const_i32(val); gen_logic_cc(s, src, OS_LONG); DEST_EA(env, insn, OS_LONG, src, NULL); + tcg_temp_free(src); } DISAS_INSN(cmp) @@ -2749,6 +2771,7 @@ DISAS_INSN(eor) tcg_gen_xor_i32(dest, src, DREG(insn, 9)); gen_logic_cc(s, dest, opsize); DEST_EA(env, insn, opsize, dest, &addr); + tcg_temp_free(dest); } static void do_exg(TCGv reg1, TCGv reg2) @@ -2799,8 +2822,8 @@ DISAS_INSN(and) tcg_gen_and_i32(dest, src, reg); gen_partset_reg(opsize, reg, dest); } - tcg_temp_free(dest); gen_logic_cc(s, dest, opsize); + tcg_temp_free(dest); } DISAS_INSN(adda)