From patchwork Tue Nov 1 20:03:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 690121 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t7hzZ59kPz9t2n for ; Wed, 2 Nov 2016 07:05:14 +1100 (AEDT) Received: from localhost ([::1]:50970 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c1fJ2-0002XC-2g for incoming@patchwork.ozlabs.org; Tue, 01 Nov 2016 16:05:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c1fHf-0001hz-OB for qemu-devel@nongnu.org; Tue, 01 Nov 2016 16:03:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c1fHb-0001IQ-6m for qemu-devel@nongnu.org; Tue, 01 Nov 2016 16:03:47 -0400 Received: from mout.kundenserver.de ([212.227.126.134]:50681) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c1fHa-0001I8-Sl for qemu-devel@nongnu.org; Tue, 01 Nov 2016 16:03:43 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue002) with ESMTPSA (Nemesis) id 0LfKSP-1cd9lX20BV-00p5k7; Tue, 01 Nov 2016 21:03:34 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 1 Nov 2016 21:03:29 +0100 Message-Id: <1478030610-18111-2-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1478030610-18111-1-git-send-email-laurent@vivier.eu> References: <1478030610-18111-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:OuBMzP/GqQrHfa4hpJBHDlg9q/jyDjbpHYinmKImnFhlYivkcpm tAmY+1ir4HRg5rwcjaqWZYHpFcPpBj6D9/YI5T4P0a/hv/NGjrEVailQlzr8E81EpMPMkhd dHw8MsJLqb8j42X+sYsb8Sj8pXxxUfsSKwcsioXpi9asWDDz4pPfj+ZYjvgIp8AP0iE1pVF Vi5eqwbRXK2JB0Bni3h5Q== X-UI-Out-Filterresults: notjunk:1; V01:K0:rhPU+znuswc=:xFYE8uurdmA/AUGtgcqHUk bSFiJcWb1gFXeQ22PAIZ6bhAJX5KEfQu2qJuK4p+SeRpzFdh3YRetP1XQA5tizqHlbhwjx6Jn EMG9+1AdsLFwvonfvzVeGmrQirF+rcgq7fj+vMhhgrb7ZKdFomUgTTP3I9wWxapBkYVqDwZx0 2INf2x4NpnXh6XhaRBYxJqnDlzkK1DH49pPmOBPkUJDV/SXA4ktI8equfTwpTVr/ZM142ortQ MUiNzQJOGBU4v1+pB3zJDG14g2QeNloIYlrXF4HCT8nCJbB7G0Uc4yr7t6FtzvRg7I+N0b49A m6ntHtm98FB0yfQmGESzG9Qte+9APxnqhHKy7Tw+QGKk1Vc234xnJ2LiOCEeLjwQwHbiOcXRQ FbC90Wlir76N2zH7k4hcWxQmcuZ9ZuY5Vk/7qjrDC1tcKKtlG1/9bupvTBkQ/KPi7UYloU4YQ /+Bh6cL0kRFGqDG9zgQC8uPCzoZ8tI71nowES0AvwQoNvTiEaIU6LMWyIaJpH9sfV4awfwUyV eTYgvhuuShWEnBqizOUMdrAE8RAc8i1Zbc0x68MyTpiSqqL3R/2zawONtSo8Pyka3/dM4yD65 zj6OA6YubiGLHSZ5Fo11/eQtEIjvoSivVlafJ8eLTx59qOC2VO3x+kW81pITZKPDtXotYmFFO 9aiw+rOn/LhOCMfpq4pF2RLIreUehinx+JrMBqVGxJzt686buXS+gFVNw/M2OpM8ZQ0c= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.134 Subject: [Qemu-devel] [PATCH v4 1/2] target-m68k: add 64bit mull X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 62 +++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 12 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 8433fa0..61986cc 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1812,24 +1812,62 @@ DISAS_INSN(tas) DISAS_INSN(mull) { uint16_t ext; - TCGv reg; TCGv src1; - TCGv dest; + int sign; - /* The upper 32 bits of the product are discarded, so - muls.l and mulu.l are functionally equivalent. */ ext = read_im16(env, s); - if (ext & 0x87ff) { - gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + + sign = ext & 0x800; + + if (ext & 0x400) { + if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) { + gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + return; + } + + SRC_EA(env, src1, OS_LONG, 0, NULL); + + if (sign) { + tcg_gen_muls2_i32(QREG_CC_Z, QREG_CC_N, src1, DREG(ext, 12)); + } else { + tcg_gen_mulu2_i32(QREG_CC_Z, QREG_CC_N, src1, DREG(ext, 12)); + } + /* if Dl == Dh, 68040 returns low word */ + tcg_gen_mov_i32(DREG(ext, 0), QREG_CC_N); + tcg_gen_mov_i32(DREG(ext, 12), QREG_CC_Z); + tcg_gen_or_i32(QREG_CC_Z, QREG_CC_Z, QREG_CC_N); + + tcg_gen_movi_i32(QREG_CC_V, 0); + tcg_gen_movi_i32(QREG_CC_C, 0); + + set_cc_op(s, CC_OP_FLAGS); return; } - reg = DREG(ext, 12); SRC_EA(env, src1, OS_LONG, 0, NULL); - dest = tcg_temp_new(); - tcg_gen_mul_i32(dest, src1, reg); - tcg_gen_mov_i32(reg, dest); - /* Unlike m68k, coldfire always clears the overflow bit. */ - gen_logic_cc(s, dest, OS_LONG); + if (m68k_feature(s->env, M68K_FEATURE_M68000)) { + tcg_gen_movi_i32(QREG_CC_C, 0); + if (sign) { + tcg_gen_muls2_i32(QREG_CC_N, QREG_CC_V, src1, DREG(ext, 12)); + /* QREG_CC_V is -(QREG_CC_V != (QREG_CC_N >> 31)) */ + tcg_gen_sari_i32(QREG_CC_Z, QREG_CC_N, 31); + tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, QREG_CC_Z); + } else { + tcg_gen_mulu2_i32(QREG_CC_N, QREG_CC_V, src1, DREG(ext, 12)); + /* QREG_CC_V is -(QREG_CC_V != 0), use QREG_CC_C as 0 */ + tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, QREG_CC_C); + } + tcg_gen_neg_i32(QREG_CC_V, QREG_CC_V); + tcg_gen_mov_i32(DREG(ext, 12), QREG_CC_N); + + tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); + + set_cc_op(s, CC_OP_FLAGS); + } else { + /* The upper 32 bits of the product are discarded, so + muls.l and mulu.l are functionally equivalent. */ + tcg_gen_mul_i32(DREG(ext, 12), src1, DREG(ext, 12)); + gen_logic_cc(s, DREG(ext, 12), OS_LONG); + } } static void gen_link(DisasContext *s, uint16_t insn, int32_t offset)