From patchwork Mon Oct 31 23:48:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 689700 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t7B1Q2YF8z9t0t for ; Tue, 1 Nov 2016 10:50:02 +1100 (AEDT) Received: from localhost ([::1]:39093 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c1ML1-0000lp-Nh for incoming@patchwork.ozlabs.org; Mon, 31 Oct 2016 19:49:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c1MJe-0008Kw-Gl for qemu-devel@nongnu.org; Mon, 31 Oct 2016 19:48:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c1MJb-00070w-Er for qemu-devel@nongnu.org; Mon, 31 Oct 2016 19:48:34 -0400 Received: from mout.kundenserver.de ([212.227.17.10]:62471) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c1MJb-00070c-32 for qemu-devel@nongnu.org; Mon, 31 Oct 2016 19:48:31 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue103) with ESMTPSA (Nemesis) id 0MASzq-1cBpug2f6Y-00BcDf; Tue, 01 Nov 2016 00:48:20 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 1 Nov 2016 00:48:11 +0100 Message-Id: <1477957692-7231-2-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477957692-7231-1-git-send-email-laurent@vivier.eu> References: <1477957692-7231-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:ku4onXm3yCrAlo4FcckJYqa2xes/UWU6+EH0i8RtXdtrH5oqRaF g8moMvTY+fQSfZj7WJ3iUiO2KxgkJwHJXmCbB21TCNswyz3brDu9p3rSapZZ0gRikyqACFd p5OrimV+xKM1vdztIkXlGmZPYKpBHFLKOpy6y1vbh1E4IxOiol//z6E0/zSSJ/7CwCXwiGF JKcp3jc6n6vo/r/9yZoig== X-UI-Out-Filterresults: notjunk:1; V01:K0:rGnGpMMWGho=:8PVXqUu70Fsxl4yzSmPZrn EgrTV0L1lFg+tyGBB56rABBxIBwEzRc8dwMXODB9M4GV4WDmeugJhlnC+ZAKcW+YWJBh7mq9q qwo86hg4Ru7NwlL9cRtbqKoPYLXQCy5cE3LvSTJOl8PN71sThPyF3qQyj2KzpRpOyvMLpZjDM cjKxy4izDPYpxuIlraihIMrTLYFasu0PEp+hBfDqsYzoO8ozYtleWqqBdoLR73fifOB5SPDq1 7zs3cCw5vXnA0xWa/+9YO3UAyK53tRmJwvPzDIiBzHPWC+4IFNptWItbZYssKpcHBd7cljyM1 +pyiitvxfXgJ14Fkg0Ymt1B3W1ZUsnuAY0Kom3/fSe6H0mFh17+WKuQA+JVDHbttUuTmnDnNF lEYSSTq8k2O7qdpXCthnbJswr5uyjVl+ZI7/89FTWjK1d6327TsFDx13sZdN3Q+DxedtE04h8 vH0MDfe3GndzoTpCuqApON9NSCMqi/ZDbqZq/xewGRz7z68HNrqcDJGyeGPus1X8YAx7v8ajT ZdxNNQr76nSMxYcFOhZzqxgxbl/YpqOebyuESJLIEr2QXWs9GX6GqIwlX20O12rL4pMLbphhF 23LQw54sSezboAxl04pRNc7+dbgkwZFF/iKDCoSkWapFLY7krKDjmshx5UZ2sAQMBrrlyd7ji rG1OP9j4Rv47jZORk9InWVsg5i1tyuTBbFj2EHxpETHt1CITGZdnJOGneYOb7LXjCKSg= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.17.10 Subject: [Qemu-devel] [PATCH v3 1/2] target-m68k: add 64bit mull X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 62 +++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 12 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index c00978d..93e201c 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1812,24 +1812,62 @@ DISAS_INSN(tas) DISAS_INSN(mull) { uint16_t ext; - TCGv reg; TCGv src1; - TCGv dest; + int sign; - /* The upper 32 bits of the product are discarded, so - muls.l and mulu.l are functionally equivalent. */ ext = read_im16(env, s); - if (ext & 0x87ff) { - gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + + sign = ext & 0x800; + + if (ext & 0x400) { + if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) { + gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + return; + } + + SRC_EA(env, src1, OS_LONG, 0, NULL); + + if (sign) { + tcg_gen_muls2_i32(QREG_CC_Z, QREG_CC_N, src1, DREG(ext, 12)); + } else { + tcg_gen_mulu2_i32(QREG_CC_Z, QREG_CC_N, src1, DREG(ext, 12)); + } + /* if Dl == Dh, 68040 returns low word */ + tcg_gen_mov_i32(DREG(ext, 0), QREG_CC_N); + tcg_gen_mov_i32(DREG(ext, 12), QREG_CC_Z); + tcg_gen_or_i32(QREG_CC_Z, QREG_CC_Z, QREG_CC_N); + + tcg_gen_movi_i32(QREG_CC_V, 0); + tcg_gen_movi_i32(QREG_CC_C, 0); + + set_cc_op(s, CC_OP_FLAGS); return; } - reg = DREG(ext, 12); SRC_EA(env, src1, OS_LONG, 0, NULL); - dest = tcg_temp_new(); - tcg_gen_mul_i32(dest, src1, reg); - tcg_gen_mov_i32(reg, dest); - /* Unlike m68k, coldfire always clears the overflow bit. */ - gen_logic_cc(s, dest, OS_LONG); + if (m68k_feature(s->env, M68K_FEATURE_M68000)) { + tcg_gen_movi_i32(QREG_CC_C, 0); + if (sign) { + tcg_gen_muls2_i32(QREG_CC_N, QREG_CC_V, src1, DREG(ext, 12)); + /* QREG_CC_V is -(QREG_CC_V != (QREG_CC_N >> 31)) */ + tcg_gen_sari_i32(QREG_CC_Z, QREG_CC_N, 31); + tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, QREG_CC_Z); + } else { + tcg_gen_mulu2_i32(QREG_CC_N, QREG_CC_V, src1, DREG(ext, 12)); + /* QREG_CC_V is -(QREG_CC_V != 0), use QREG_CC_C as 0 */ + tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, QREG_CC_C); + } + tcg_gen_neg_i32(QREG_CC_V, QREG_CC_V); + tcg_gen_mov_i32(DREG(ext, 12), QREG_CC_N); + + tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); + + set_cc_op(s, CC_OP_FLAGS); + } else { + /* The upper 32 bits of the product are discarded, so + muls.l and mulu.l are functionally equivalent. */ + tcg_gen_mul_i32(DREG(ext, 12), src1, DREG(ext, 12)); + gen_logic_cc(s, DREG(ext, 12), OS_LONG); + } } static void gen_link(DisasContext *s, uint16_t insn, int32_t offset)