From patchwork Fri Oct 28 23:01:12 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 688663 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t5K6L1qHFz9t1F for ; Sat, 29 Oct 2016 10:02:50 +1100 (AEDT) Received: from localhost ([::1]:52246 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c0GAh-0001VG-SR for incoming@patchwork.ozlabs.org; Fri, 28 Oct 2016 19:02:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36001) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c0G9P-0000UM-3j for qemu-devel@nongnu.org; Fri, 28 Oct 2016 19:01:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c0G9M-0003bC-Ag for qemu-devel@nongnu.org; Fri, 28 Oct 2016 19:01:27 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:65233) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c0G9M-0003as-0F for qemu-devel@nongnu.org; Fri, 28 Oct 2016 19:01:24 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue002) with ESMTPSA (Nemesis) id 0Lghtu-1ceIBP0rvK-00oFja; Sat, 29 Oct 2016 01:01:17 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Sat, 29 Oct 2016 01:01:12 +0200 Message-Id: <1477695673-25601-2-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477695673-25601-1-git-send-email-laurent@vivier.eu> References: <1477695673-25601-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:XZv3tBeJ4Gq+6nzSL1MPKLUqLxaZMlj5CxQvp21oarC7pfEx2IG nAp1qyfPMBgW7BC44sDIfWdE7K0HQhYeF54ol+VThj9dCwS+H4EPBjuyIFSI6CafruinUqO XO820QclIRS3F3EwdIbtuq5Gfg9R/U/16qPRHjmrGc3TSpBbz6VoIx644xy0n9NveAmjqB+ sUjUAdQWcPFWWohx8Ggqg== X-UI-Out-Filterresults: notjunk:1; V01:K0:gDKVcVhvGMw=:UkMUHUKzxrNq3B7VjKZit4 Nhg9w4zaPpvNHqVz4fnrK645XJifuACLbT8rW1/9Is+ElMrOpvvhkK4GgWlyHlmsuEgN51fkk qMDhCyForUOmehT9tSIzkD0aNmxpqXLaZDZBrXBgFKiCDPubfu8DqQBdw935sOqWwvV2G+eXf mJSN7/Qe7BIWg7BuqcORF9ZZGXnJg4CW2wEdbeHSBFaeN3IQWaDTKbd7EygTiNyiEmp5I3T+U 62imHBS5swSco75JsDh4v9IwV2NSHL/YXKVyiGFOZ1xWV0GG/RDEwGXWF0Ms+Qd1ov7HMgNNM 72oTDPfBOSRWDUfwsSYIxTueS+XQEVia3XLcGd/tDgklyVtuy5qnWJ8MicGCSPTQ+SyiQJabM 1YjvHjbRitt7HUQS4jXZ88q4R3SSKp3hlIQWIaFV7Een4q3iMO1X2/tAuR4rLPtGweKN9epuU Be2Y0Co4blfYUqzjo1qtl2oM7NT5xIALuv3jyInZ+viFHa5FxtLhnYsED1qMJda0WQZbWrl0X knfGeIIV1m27qM8P/zVYQHkKx28B5zC/vfi2jhZGYPZlxv2wx7/46Xz4YyauBsh2/z7MPVxOM fY8lCQW5xhBryC4Hor8mC0AAbfDotcNe0Didfbt+3m0aC9hmZmdNxKANroBcFYw0Iaz3z0pYc tkTyJD4+XGAZ+IVbEXEW8CLN3eRQpufOQrbja42HT0Q3UXP3tnFeqsWBbmSUDdoDIPh4= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.135 Subject: [Qemu-devel] [PATCH v2 1/2] target-m68k: add 64bit mull X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 60 +++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 48 insertions(+), 12 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index c00978d..d612a82 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1812,24 +1812,60 @@ DISAS_INSN(tas) DISAS_INSN(mull) { uint16_t ext; - TCGv reg; TCGv src1; - TCGv dest; + int sign; - /* The upper 32 bits of the product are discarded, so - muls.l and mulu.l are functionally equivalent. */ ext = read_im16(env, s); - if (ext & 0x87ff) { - gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + + sign = ext & 0x800; + + if (ext & 0x400) { + if (!m68k_feature(s->env, M68K_FEATURE_QUAD_MULDIV)) { + gen_exception(s, s->pc - 4, EXCP_UNSUPPORTED); + return; + } + + SRC_EA(env, src1, OS_LONG, 0, NULL); + + if (sign) { + tcg_gen_muls2_i32(DREG(ext, 12), DREG(ext, 0), src1, DREG(ext, 12)); + } else { + tcg_gen_mulu2_i32(DREG(ext, 12), DREG(ext, 0), src1, DREG(ext, 12)); + } + + tcg_gen_movi_i32(QREG_CC_V, 0); + tcg_gen_mov_i32(QREG_CC_C, QREG_CC_V); + tcg_gen_mov_i32(QREG_CC_N, DREG(ext, 0)); + tcg_gen_or_i32(QREG_CC_Z, DREG(ext, 12), DREG(ext, 0)); + + set_cc_op(s, CC_OP_FLAGS); return; } - reg = DREG(ext, 12); SRC_EA(env, src1, OS_LONG, 0, NULL); - dest = tcg_temp_new(); - tcg_gen_mul_i32(dest, src1, reg); - tcg_gen_mov_i32(reg, dest); - /* Unlike m68k, coldfire always clears the overflow bit. */ - gen_logic_cc(s, dest, OS_LONG); + if (m68k_feature(s->env, M68K_FEATURE_M68000)) { + tcg_gen_movi_i32(QREG_CC_C, 0); + if (sign) { + tcg_gen_muls2_i32(QREG_CC_N, QREG_CC_V, src1, DREG(ext, 12)); + /* QREG_CC_V is -(QREG_CC_V != (QREG_CC_N >> 31)) */ + tcg_gen_sari_i32(QREG_CC_Z, QREG_CC_N, 31); + tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, QREG_CC_Z); + } else { + tcg_gen_mulu2_i32(QREG_CC_N, QREG_CC_V, src1, DREG(ext, 12)); + /* QREG_CC_V is -(QREG_CC_V != 0), use QREG_CC_C as 0 */ + tcg_gen_setcond_i32(TCG_COND_NE, QREG_CC_V, QREG_CC_V, QREG_CC_C); + } + tcg_gen_neg_i32(QREG_CC_V, QREG_CC_V); + tcg_gen_mov_i32(DREG(ext, 12), QREG_CC_N); + + tcg_gen_mov_i32(QREG_CC_Z, QREG_CC_N); + + set_cc_op(s, CC_OP_FLAGS); + } else { + /* The upper 32 bits of the product are discarded, so + muls.l and mulu.l are functionally equivalent. */ + tcg_gen_mul_i32(DREG(ext, 12), src1, DREG(ext, 12)); + gen_logic_cc(s, DREG(ext, 12), OS_LONG); + } } static void gen_link(DisasContext *s, uint16_t insn, int32_t offset)