From patchwork Wed Oct 26 16:35:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 687280 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t3xrb2WBZz9svs for ; Thu, 27 Oct 2016 04:31:11 +1100 (AEDT) Received: from localhost ([::1]:36321 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzS2e-0006wM-C3 for incoming@patchwork.ozlabs.org; Wed, 26 Oct 2016 13:31:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42737) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzRBh-0002T8-Kn for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzRBe-00055l-JX for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:25 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:50959) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bzRBe-00054b-AI for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:22 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue003) with ESMTPSA (Nemesis) id 0M856T-1clsw148mn-00vfLG; Wed, 26 Oct 2016 18:36:13 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 26 Oct 2016 18:35:53 +0200 Message-Id: <1477499766-11722-4-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477499766-11722-1-git-send-email-laurent@vivier.eu> References: <1477499766-11722-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:U3PZWuFvB8dfy2lxhPBvPpDZCbQvbMo0KTkgQjYE4IkHXEKnhNG I+NHANsOMz8jmtNmvBOQyIrr+/DxYSVvyXiVeM+f2VJZcbafX/YGDmV4PM5XzC6+utQArTi 6yFguJps5e0GIW/O5v4CQrEJlVWphaWRtVyR639XC5Tl2uskelyF7epgOb7EWbLWBRwNl/G L/E9CQFUnHcYdvuhOfaag== X-UI-Out-Filterresults: notjunk:1; V01:K0:QCnfJs0lcE0=:O4g7M3PPzonOQmaPlSkVW8 zLJDaAzcFV5+EzBYCPPLotZQ0P43NIcBjDZn4VzB1vqy00Soy3mO9aKtcwp9tEXyTRCBjpgV/ qOKWKvsxE3qUks0XGhXLdzW/QOD9b6VNBDaUxdjadm/zupy0rO1xroi7bQ4qXu79Db1IDSlOt 5NhfnfHV2plrQf5F5VpwutfFOBvMJm2AYSxmlEySIv6TCH9DgtlJu6e5rhYX/LPg+PsRsWp86 aAf83qdNoFqsbzva4tE5EaNhJJqkHotGRQZ9IJBDn4O/DKEHr8duwVIqNkR3WX4TXQ6oiGpxQ tXjU6u0IkVOHFMBUL8hY+kQVaMLxHPaJZNhPwhJ05ubJwZd5NHrp/HpLNef2K+moC9wwpJqQV iAcgiDV1/o58x2Kj0/AJV7shb+zjJTWbcvAQ6ZsG5qEDYEu/h9s1urhAC1rhbyJ7w+TEYxVcK 0YJJQDqi4XtCBIJxekU0L3h0AkovPlPwWHfQHstXpc6TrVyEbJ2D+ZS0bxG3jhu9OF0FKHhP3 SzgSpxbLH83gCvklSkOR64xRpDpIARXpv2udqNx7MpeGs1MR4Ooon0816vJHfaR7Ajao8BHBE 3ab/A04xohKpjiWEKSJ66gTTuWI6gaqSTSy2oGz44DS1WCWbcW+7trEaH6cwtpKmBRvqayIl9 PzNhSALiSVnMaKP0sQn0wdYoDNEhkjgAP5KkPAfrsGw6D+R3sMRQGdxfpfogXlW8DGy4= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.133 Subject: [Qemu-devel] [PATCH 03/16] target-m68k: add exg ops X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 0d3111d..a07b6f5 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -2021,6 +2021,41 @@ DISAS_INSN(eor) DEST_EA(env, insn, OS_LONG, dest, &addr); } +DISAS_INSN(exg) +{ + TCGv src; + TCGv reg; + TCGv dest; + int exg_mode; + + exg_mode = insn & 0x1f8; + + dest = tcg_temp_new(); + switch (exg_mode) { + case 0x140: + /* exchange Dx and Dy */ + src = DREG(insn, 9); + reg = DREG(insn, 0); + break; + case 0x148: + /* exchange Ax and Ay */ + src = AREG(insn, 9); + reg = AREG(insn, 0); + break; + case 0x188: + /* exchange Dx and Ay */ + src = DREG(insn, 9); + reg = AREG(insn, 0); + break; + default: + g_assert_not_reached(); + } + tcg_gen_mov_i32(dest, src); + tcg_gen_mov_i32(src, reg); + tcg_gen_mov_i32(reg, dest); + tcg_temp_free(dest); +} + DISAS_INSN(and) { TCGv src; @@ -3154,6 +3189,12 @@ void register_m68k_insns (CPUM68KState *env) INSN(cmpa, b0c0, f0c0, M68000); INSN(eor, b180, f1c0, CF_ISA_A); BASE(and, c000, f000); + INSN(undef, c140, f1f8, CF_ISA_A); + INSN(exg, c140, f1f8, M68000); + INSN(undef, c148, f1f8, CF_ISA_A); + INSN(exg, c148, f1f8, M68000); + INSN(undef, c188, f1f8, CF_ISA_A); + INSN(exg, c188, f1f8, M68000); BASE(mulw, c0c0, f0c0); BASE(addsub, d000, f000); INSN(addx, d180, f1f8, CF_ISA_A);