From patchwork Wed Oct 26 16:36:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 687289 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t3y6W5t5Zz9t17 for ; Thu, 27 Oct 2016 04:43:15 +1100 (AEDT) Received: from localhost ([::1]:36394 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzSEL-0000o3-3j for incoming@patchwork.ozlabs.org; Wed, 26 Oct 2016 13:43:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42889) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzRBn-0002Z0-CZ for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzRBj-00059J-DW for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:31 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:65504) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bzRBj-00058T-1k for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:27 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue003) with ESMTPSA (Nemesis) id 0MDl1u-1c7hKl3jRO-00H91J; Wed, 26 Oct 2016 18:36:22 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 26 Oct 2016 18:36:06 +0200 Message-Id: <1477499766-11722-17-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477499766-11722-1-git-send-email-laurent@vivier.eu> References: <1477499766-11722-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:Q+EVtJD8D4xBvmVDfie1HBaU42zCBG6uxwbtXaHtDy04Bjq8er0 5F/WLoK6Lb7p8LDBCzxkorpAvQjkX376D996U8tPX7ISKneuVrHkzaCN+5lFnYw9coeIJx0 SeR+wQaImrkIDnd/6To/FyTefG/eXcJ26r39dAlYiWEwR6HKwyrLBpXpv0RpPCcA3htk6YM RoJy8K2s0vntZ+RPhyHmA== X-UI-Out-Filterresults: notjunk:1; V01:K0:SQoa9bqhc6Q=:nLFFv7IOpQw/LaUmgiwCu4 rf1RbBDgLV80cOBiRzlkAxuRqhoxZwqi8ShCD7Sfje6XbjZByzpQrFs0f0quOuJZ4cIT9r9bS xA5bVfwJopf4yPGdhSE0gJSVfZ42IWLf2eLcKYwgJ4M6LyKA2yi4GFPkYj2bcAWKT37Lke0QG lZmwSfIpb3Bo6zF0KGK65oEDr850IJ/pKTLdsUyjSu98BzGMaYuctjtss6UX7t4ASfmRv1NwM WUONpHwFgKA3GZxKNTrJmsBojPipZTTLTCUsuNMpgtFEZrZ/kiS2P6M6s9yZYssJYdd33IYAg 5Z/1XbOO4qQbLfogIb5WRaKubIDpXAw9Jbf6cNZYgVk4dcgXFL0AbjXjhf5LmLkiMYlbCXZ/5 SwTnFxLrKdVfSYVY+91KTlTwWMEMtCpzaTkfu/pim5UsInaad4hBm74hZyE0gAI68tP3cMRSG F9YYipDY3Uo5foZaaH2+2Ups2W43Baq3NYYsvFZ+tv/XAS0drZfSHwpjVRwmBzpQY6qv9ybTT +OJ2pSiWjwZLpZbXPkNLKMBNZxSPSqxALyQtohjENYzdQBU7gSdERdykiks4w5Hb/O9UC405a f6mqG1WWs68NyGnsacJo9S1nETr3UzmAezZqg8fEtRaJPZD4Pfsb0OjDpSD1CBO+NgCNk+nWZ dClZAtRHrigD+Bjla28IPBeAiGzYfY7zQVTyBb8yBa9tnxnGSb4s2+OvwKlWdyNArXp0= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.187 Subject: [Qemu-devel] [PATCH 16/16] target-m68k: immediate ops manage word and byte operands X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 57 ++++++++++++++++++++++++++++++------------------- 1 file changed, 35 insertions(+), 22 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 1685abb..125b502 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1461,52 +1461,65 @@ DISAS_INSN(bitop_im) DISAS_INSN(arith_im) { int op; - uint32_t im; + TCGv im; TCGv src1; TCGv dest; TCGv addr; + int opsize; op = (insn >> 9) & 7; - SRC_EA(env, src1, OS_LONG, 0, (op == 6) ? NULL : &addr); - im = read_im32(env, s); + opsize = insn_opsize(insn); + switch (opsize) { + case OS_BYTE: + im = tcg_const_i32((int8_t)read_im8(env, s)); + break; + case OS_WORD: + im = tcg_const_i32((int16_t)read_im16(env, s)); + break; + case OS_LONG: + im = tcg_const_i32(read_im32(env, s)); + break; + default: + abort(); + } + SRC_EA(env, src1, opsize, 1, (op == 6) ? NULL : &addr); dest = tcg_temp_new(); switch (op) { case 0: /* ori */ - tcg_gen_ori_i32(dest, src1, im); - gen_logic_cc(s, dest, OS_LONG); + tcg_gen_or_i32(dest, src1, im); + gen_logic_cc(s, dest, opsize); break; case 1: /* andi */ - tcg_gen_andi_i32(dest, src1, im); - gen_logic_cc(s, dest, OS_LONG); + tcg_gen_and_i32(dest, src1, im); + gen_logic_cc(s, dest, opsize); break; case 2: /* subi */ - tcg_gen_mov_i32(dest, src1); - tcg_gen_setcondi_i32(TCG_COND_LTU, QREG_CC_X, dest, im); - tcg_gen_subi_i32(dest, dest, im); - gen_update_cc_add(dest, tcg_const_i32(im), OS_LONG); - set_cc_op(s, CC_OP_SUBL); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, src1, im); + tcg_gen_sub_i32(dest, src1, im); + gen_update_cc_add(dest, im, opsize); + set_cc_op(s, CC_OP_SUBB + opsize); break; case 3: /* addi */ - tcg_gen_mov_i32(dest, src1); - tcg_gen_addi_i32(dest, dest, im); - gen_update_cc_add(dest, tcg_const_i32(im), OS_LONG); - tcg_gen_setcondi_i32(TCG_COND_LTU, QREG_CC_X, dest, im); - set_cc_op(s, CC_OP_ADDL); + tcg_gen_add_i32(dest, src1, im); + gen_update_cc_add(dest, im, opsize); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, im); + set_cc_op(s, CC_OP_ADDB + opsize); break; case 5: /* eori */ - tcg_gen_xori_i32(dest, src1, im); - gen_logic_cc(s, dest, OS_LONG); + tcg_gen_xor_i32(dest, src1, im); + gen_logic_cc(s, dest, opsize); break; case 6: /* cmpi */ - gen_update_cc_add(src1, tcg_const_i32(im), OS_LONG); - set_cc_op(s, CC_OP_CMPL); + gen_update_cc_cmp(s, src1, im, opsize); break; default: abort(); } + tcg_temp_free(im); if (op != 6) { - DEST_EA(env, insn, OS_LONG, dest, &addr); + DEST_EA(env, insn, opsize, dest, &addr); } + tcg_temp_free(dest); } DISAS_INSN(byterev)