From patchwork Tue Oct 25 19:03:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 686658 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t3NCf63Pcz9s8x for ; Wed, 26 Oct 2016 06:15:42 +1100 (AEDT) Received: from localhost ([::1]:57675 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz7CG-0007RV-F1 for incoming@patchwork.ozlabs.org; Tue, 25 Oct 2016 15:15:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46525) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz70m-0005xB-2G for qemu-devel@nongnu.org; Tue, 25 Oct 2016 15:03:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bz70i-0007qJ-TM for qemu-devel@nongnu.org; Tue, 25 Oct 2016 15:03:48 -0400 Received: from mout.kundenserver.de ([217.72.192.75]:50569) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bz70i-0007pG-Je for qemu-devel@nongnu.org; Tue, 25 Oct 2016 15:03:44 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue101) with ESMTPSA (Nemesis) id 0MhUQs-1cKeJ21hRa-00MZpN; Tue, 25 Oct 2016 21:03:42 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 25 Oct 2016 21:03:17 +0200 Message-Id: <1477422199-11208-22-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477422199-11208-1-git-send-email-laurent@vivier.eu> References: <1477422199-11208-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:B0uIjbogyZ4bPlJal3Rjkm1Vh9eErcgnagayHyeIL98wjhzqNiJ iISAviGpRz1D93UnYeYz8SVg1l/WXL/xD0UjE+xl6lcKEJGvQgoHYP/zBqyg/N144aXzXAQ RIO7UBniFMbRWOO/VC9WRnXjdPym4PL9wnIaICEWLABE5CvlmynIwUejvGAi/FmIWI3G/Co y+OjNI0ceV2UiUbd8t1Qg== X-UI-Out-Filterresults: notjunk:1; V01:K0:OKs8HXbLw48=:rmtqEGLyUyFUN2j4dUy+Y+ Q7k7tmxQ+OCwI/KR5CxXNVZ3bzTYtfPfWEv75fgGw+oYmkKYy9rGoj+ThVxb4ijRSIgLH2D1X f4cJVrafJC5nEVtneujQQ0Bei8mwCk6KGvL0dng5oh68Ct5YEHqeLjg0Po1lvmT6OCc00/2yA pyDK7fHF3dVWV78tnfxqM5byheBC/CiYfRH18ZRRNejNr72OJxqCuqkujaD2HQvxfSoB/wJd8 rlD33AWCxO6mchyvqLuwT6xddgBqoTjmUKMuuivfub+DZ/W1360Ggxk+N/9KYChFldHpJa+Da PltlQvp2j30HP/CizhGFgibvlCbV/fhAS/9sSywbMYu5jWSw64Ags+Q1/Eqa15hRsRtdpwBiO ryaQsF4U3kivs9E+GEAy54n5Hu50UjxgW7wlrIoHiYjUG4s4nRpo/MVqwaWiBondjeUih1I6Z CH3HW4bVjxM6KlTKU5hBxutGc5F5+6Lo82IMup4jaKlDZJVZn2oZtXFEPpCU5FI1QUEEaXRBx JG0KI8M3EpqhBSntXz2ut4hkZrZ0N1tWNZp3kXuVShE5Ahjiv32lswr7l592wf81HDnuuF3pi vQEQTFHRM3M+oJ0xEMfhbht4SIa/N+zYTjztFXsCF5OjOU/iXd9qbwelGQbvblPxUr9qfOKpe 9JA4SAFq42qh5RIuMsbze3IqrmubFx2nguMOgZHExXLPJm+1H2+TJZbfvk9+gXKbhO7Y= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 217.72.192.75 Subject: [Qemu-devel] [PULL 21/23] target-m68k: Use setcond for scc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 4a650e1..5cc5e14 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -865,19 +865,21 @@ static void gen_jmpcc(DisasContext *s, int cond, TCGLabel *l1) DISAS_INSN(scc) { - TCGLabel *l1; + DisasCompare c; int cond; - TCGv reg; + TCGv reg, tmp; - l1 = gen_new_label(); cond = (insn >> 8) & 0xf; + gen_cc_cond(&c, s, cond); + + tmp = tcg_temp_new(); + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); + free_cond(&c); + reg = DREG(insn, 0); - tcg_gen_andi_i32(reg, reg, 0xffffff00); - /* This is safe because we modify the reg directly, with no other values - live. */ - gen_jmpcc(s, cond ^ 1, l1); - tcg_gen_ori_i32(reg, reg, 0xff); - gen_set_label(l1); + tcg_gen_neg_i32(tmp, tmp); + tcg_gen_deposit_i32(reg, reg, tmp, 0, 8); + tcg_temp_free(tmp); } /* Force a TB lookup after an instruction that changes the CPU state. */