From patchwork Tue Oct 25 14:50:09 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 686531 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3t3Gqb6VDcz9ryQ for ; Wed, 26 Oct 2016 02:12:59 +1100 (AEDT) Received: from localhost ([::1]:55301 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz3PM-0001x3-J1 for incoming@patchwork.ozlabs.org; Tue, 25 Oct 2016 11:12:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60333) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bz33r-0008UT-NV for qemu-devel@nongnu.org; Tue, 25 Oct 2016 10:50:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bz33m-0005yH-PI for qemu-devel@nongnu.org; Tue, 25 Oct 2016 10:50:43 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:58614) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bz33m-0005xG-FW for qemu-devel@nongnu.org; Tue, 25 Oct 2016 10:50:38 -0400 Received: from Quad.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue003) with ESMTPSA (Nemesis) id 0Mewwv-1cIUgC1D8z-00OXYe; Tue, 25 Oct 2016 16:50:33 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 25 Oct 2016 16:50:09 +0200 Message-Id: <1477407021-30755-12-git-send-email-laurent@vivier.eu> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1477407021-30755-1-git-send-email-laurent@vivier.eu> References: <1477407021-30755-1-git-send-email-laurent@vivier.eu> X-Provags-ID: V03:K0:eX46yjIdojI1e/7xVXtTbMp5WQw0rGlk4Zrml6tiNxJei8xrWg7 n17BeDDs2JlfSwpVnw4nfBL/s0f0W7W+v5GvW3y20z7+Dd5IYXlKUHqrBwmBVQseJll1By4 M+QGFnhSWYStUT5ozL9ZCJvGccb0akSgMqGeV15W577pP2CsBRsHvO+oEfCY6UkzA2ys22b fnAhOiyaGbO/wQQKF7shg== X-UI-Out-Filterresults: notjunk:1; V01:K0:P4C9eADPNnk=:lwQqlm3+Pn8txac3XL2+R6 KCc75llCb+k9hfKj7XndbrdbSqQfr2zYs7CRKvu+WDdVvcEC5HDU9tYznLqE7F9apwXMco9VV Whe5g/RHEG0jw9YYUdi2EsJDnTy/LF4qdW6Hew2ehW63LhcHI3B8Tyxaiv0aiYWt6yrecENzB w06dcIZzIfWXtLqSp8gTjxWUr8ir2kLzd02N/cSsirRPIvECylLHnNztz64d9V0LAJQSI3ml1 3zwmimTYRhLk93CEMaY1keRSXysDwTS+bB0xd13D9vEP9rBGdc9J/ztdRF9ftAam2iOgP5B2j mAZ7sAFVcdtWuZc657SaEq/PCnrl0YygUbM4qzTkiZlIBK+x4JfLUh2OGdnoUUM5ab4Dvso0v whu7cs+KNQVsbu4v493QOvXVsrJkN3WHHgFpOu7TUucq3kQQHB1CbLA8kI68ZI43CR38JFoiI Qk7UIyyByk+6OIMqBYIs2+Z6/AA+eJNVIm0DcirLyivL7S9HLeE7DlYJfofY0OjP1B3ezU29v 6K3eRVmv+2QQ3MEkNiw8Xer50PAV/fqayQg/ccanWSges9JP7K6xNHVzx8KjJF+/OcY58hWuL miCtZPFfDMw15aQxVNeZt7gBXSnIKUXwSC6lDxF39Wd/JfzwCoI4sfWB1x9FyMqReJeRgFwEd MAc4+CaaLR62PfqTU6xiq/s7d+Z4sZftWj+6OV08GU8MYkCI46lIBpbegk/CmclwpmMI= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 212.227.126.135 Subject: [Qemu-devel] [PATCH 11/23] target-m68k: Replace helper_xflag_lt with setcond X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , gerg@uclinux.org, schwab@linux-m68k.org, agraf@suse.de, Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Laurent Vivier --- target-m68k/helper.c | 5 ----- target-m68k/helper.h | 1 - target-m68k/translate.c | 14 +++++++------- 3 files changed, 7 insertions(+), 13 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 4fe36b8..dc55a7a 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -464,11 +464,6 @@ uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2) return res; } -uint32_t HELPER(xflag_lt)(uint32_t a, uint32_t b) -{ - return a < b; -} - void HELPER(set_sr)(CPUM68KState *env, uint32_t val) { env->sr = val & 0xffff; diff --git a/target-m68k/helper.h b/target-m68k/helper.h index f4e5fdf..c24ace5 100644 --- a/target-m68k/helper.h +++ b/target-m68k/helper.h @@ -8,7 +8,6 @@ DEF_HELPER_3(subx_cc, i32, env, i32, i32) DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shr_cc, i32, env, i32, i32) DEF_HELPER_3(sar_cc, i32, env, i32, i32) -DEF_HELPER_2(xflag_lt, i32, i32, i32) DEF_HELPER_2(set_sr, void, env, i32) DEF_HELPER_3(movec, void, env, i32, i32) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index e2f176e..650c141 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1032,10 +1032,10 @@ DISAS_INSN(addsub) } if (add) { tcg_gen_add_i32(dest, tmp, src); - gen_helper_xflag_lt(QREG_CC_X, dest, src); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, src); s->cc_op = CC_OP_ADD; } else { - gen_helper_xflag_lt(QREG_CC_X, tmp, src); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, tmp, src); tcg_gen_sub_i32(dest, tmp, src); s->cc_op = CC_OP_SUB; } @@ -1248,7 +1248,7 @@ DISAS_INSN(arith_im) break; case 2: /* subi */ tcg_gen_mov_i32(dest, src1); - gen_helper_xflag_lt(QREG_CC_X, dest, tcg_const_i32(im)); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, tcg_const_i32(im)); tcg_gen_subi_i32(dest, dest, im); gen_update_cc_add(dest, tcg_const_i32(im)); s->cc_op = CC_OP_SUB; @@ -1257,7 +1257,7 @@ DISAS_INSN(arith_im) tcg_gen_mov_i32(dest, src1); tcg_gen_addi_i32(dest, dest, im); gen_update_cc_add(dest, tcg_const_i32(im)); - gen_helper_xflag_lt(QREG_CC_X, dest, tcg_const_i32(im)); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, tcg_const_i32(im)); s->cc_op = CC_OP_ADD; break; case 5: /* eori */ @@ -1387,7 +1387,7 @@ DISAS_INSN(neg) tcg_gen_neg_i32(reg, src1); s->cc_op = CC_OP_SUB; gen_update_cc_add(reg, src1); - gen_helper_xflag_lt(QREG_CC_X, tcg_const_i32(0), src1); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, tcg_const_i32(0), src1); s->cc_op = CC_OP_SUB; } @@ -1633,12 +1633,12 @@ DISAS_INSN(addsubq) } else { src2 = tcg_const_i32(val); if (insn & 0x0100) { - gen_helper_xflag_lt(QREG_CC_X, dest, src2); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, src2); tcg_gen_subi_i32(dest, dest, val); s->cc_op = CC_OP_SUB; } else { tcg_gen_addi_i32(dest, dest, val); - gen_helper_xflag_lt(QREG_CC_X, dest, src2); + tcg_gen_setcond_i32(TCG_COND_LTU, QREG_CC_X, dest, src2); s->cc_op = CC_OP_ADD; } gen_update_cc_add(dest, src2);