From patchwork Thu Oct 13 16:25:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 681878 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3svxlM4bJFz9s8x for ; Fri, 14 Oct 2016 03:58:55 +1100 (AEDT) Received: from localhost ([::1]:41937 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bujLI-0006MX-Ma for incoming@patchwork.ozlabs.org; Thu, 13 Oct 2016 12:58:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42583) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1buipz-0005A1-6U for qemu-devel@nongnu.org; Thu, 13 Oct 2016 12:26:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1buipv-0008Qy-Tn for qemu-devel@nongnu.org; Thu, 13 Oct 2016 12:26:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:20493) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1buipv-0008Qi-LC for qemu-devel@nongnu.org; Thu, 13 Oct 2016 12:26:27 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 29D7280099; Thu, 13 Oct 2016 16:26:27 +0000 (UTC) Received: from thinkpad.redhat.com (ovpn-112-33.ams2.redhat.com [10.36.112.33]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u9DGP2n9010294; Thu, 13 Oct 2016 12:26:23 -0400 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Thu, 13 Oct 2016 18:25:02 +0200 Message-Id: <1476375902-11715-21-git-send-email-lvivier@redhat.com> In-Reply-To: <1476375902-11715-1-git-send-email-lvivier@redhat.com> References: <1476375902-11715-1-git-send-email-lvivier@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Thu, 13 Oct 2016 16:26:27 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 20/20] exec: move cpu_exec_init() to cpu_common_initfn() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matthew Rosato , Peter Maydell , Eduardo Habkost , Laurent Vivier , Markus Armbruster , Bharata B Rao , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" As all XX_cpu_initfn() call cpu_exec_init(), we can move it to cpu_common_initfn(). CC: Eduardo Habkost Signed-off-by: Laurent Vivier --- include/exec/exec-all.h | 1 - include/qom/cpu.h | 1 + qom/cpu.c | 2 ++ target-alpha/cpu.c | 1 - target-arm/cpu.c | 1 - target-cris/cpu.c | 1 - target-i386/cpu.c | 1 - target-lm32/cpu.c | 1 - target-m68k/cpu.c | 1 - target-microblaze/cpu.c | 1 - target-mips/cpu.c | 1 - target-moxie/cpu.c | 1 - target-openrisc/cpu.c | 1 - target-ppc/translate_init.c | 1 - target-s390x/cpu.c | 1 - target-sh4/cpu.c | 1 - target-sparc/cpu.c | 1 - target-tilegx/cpu.c | 1 - target-tricore/cpu.c | 1 - target-unicore32/cpu.c | 1 - target-xtensa/cpu.c | 1 - 21 files changed, 3 insertions(+), 19 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b42533e..c7a3b65 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -57,7 +57,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, uint32_t flags, int cflags); -void cpu_exec_init(CPUState *cpu); void cpu_exec_realize(CPUState *cpu, Error **errp); void QEMU_NORETURN cpu_loop_exit(CPUState *cpu); void QEMU_NORETURN cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 4962980..f45b967 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -946,6 +946,7 @@ AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx); void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...) GCC_FMT_ATTR(2, 3); +void cpu_exec_init(CPUState *cpu); void cpu_exec_unrealize(CPUState *cpu); #ifdef CONFIG_SOFTMMU diff --git a/qom/cpu.c b/qom/cpu.c index 39590e1..26989a2 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -362,6 +362,8 @@ static void cpu_common_initfn(Object *obj) QTAILQ_INIT(&cpu->watchpoints); cpu->trace_dstate = bitmap_new(trace_get_vcpu_event_count()); + + cpu_exec_init(cpu); } static void cpu_common_finalize(Object *obj) diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index e0d21fe..995bf79 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -273,7 +273,6 @@ static void alpha_cpu_initfn(Object *obj) CPUAlphaState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(cs); tlb_flush(cs, 1); alpha_translate_init(); diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 54e7991..d521a74 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -443,7 +443,6 @@ static void arm_cpu_initfn(Object *obj) static bool inited; cs->env_ptr = &cpu->env; - cpu_exec_init(cs); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); diff --git a/target-cris/cpu.c b/target-cris/cpu.c index d50ead5..034666f 100644 --- a/target-cris/cpu.c +++ b/target-cris/cpu.c @@ -194,7 +194,6 @@ static void cris_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(cs); env->pregs[PR_VR] = ccc->vr; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 4741dd6..c3b192d 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -3368,7 +3368,6 @@ static void x86_cpu_initfn(Object *obj) FeatureWord w; cs->env_ptr = env; - cpu_exec_init(cs); object_property_add(obj, "family", "int", x86_cpuid_version_get_family, diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c index e021236..273d881 100644 --- a/target-lm32/cpu.c +++ b/target-lm32/cpu.c @@ -167,7 +167,6 @@ static void lm32_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(cs); env->flags = 0; diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c index f60a7a5..5012c26 100644 --- a/target-m68k/cpu.c +++ b/target-m68k/cpu.c @@ -183,7 +183,6 @@ static void m68k_cpu_initfn(Object *obj) static bool inited; cs->env_ptr = env; - cpu_exec_init(cs); if (tcg_enabled() && !inited) { inited = true; diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c index 7a662b9..a4fabe4 100644 --- a/target-microblaze/cpu.c +++ b/target-microblaze/cpu.c @@ -206,7 +206,6 @@ static void mb_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(cs); set_float_rounding_mode(float_round_nearest_even, &env->fp_status); diff --git a/target-mips/cpu.c b/target-mips/cpu.c index d16685e..ef59c66 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -145,7 +145,6 @@ static void mips_cpu_initfn(Object *obj) CPUMIPSState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(cs); if (tcg_enabled()) { mips_tcg_init(); diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c index a4003aa..d5015ae 100644 --- a/target-moxie/cpu.c +++ b/target-moxie/cpu.c @@ -82,7 +82,6 @@ static void moxie_cpu_initfn(Object *obj) static int inited; cs->env_ptr = &cpu->env; - cpu_exec_init(cs); if (tcg_enabled() && !inited) { inited = 1; diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 710ff5e..f0a5ca2 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -102,7 +102,6 @@ static void openrisc_cpu_initfn(Object *obj) static int inited; cs->env_ptr = &cpu->env; - cpu_exec_init(cs); #ifndef CONFIG_USER_ONLY cpu_openrisc_mmu_init(cpu); diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index bbca8b5..1cee88d 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -10432,7 +10432,6 @@ static void ppc_cpu_initfn(Object *obj) CPUPPCState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(cs); env->msr_mask = pcc->msr_mask; env->mmu_model = pcc->mmu_model; diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c index f92adad..d405947 100644 --- a/target-s390x/cpu.c +++ b/target-s390x/cpu.c @@ -289,7 +289,6 @@ static void s390_cpu_initfn(Object *obj) cs->env_ptr = env; cs->halted = 1; cs->exception_index = EXCP_HLT; - cpu_exec_init(cs); object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id, s390x_cpu_set_id, NULL, NULL, NULL); s390_cpu_model_register_props(obj); diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c index e31233e..73d889a 100644 --- a/target-sh4/cpu.c +++ b/target-sh4/cpu.c @@ -265,7 +265,6 @@ static void superh_cpu_initfn(Object *obj) CPUSH4State *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(cs); env->movcal_backup_tail = &(env->movcal_backup); diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index d60cc65..cf27949 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -822,7 +822,6 @@ static void sparc_cpu_initfn(Object *obj) CPUSPARCState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(cs); if (tcg_enabled()) { gen_intermediate_code_init(env); diff --git a/target-tilegx/cpu.c b/target-tilegx/cpu.c index d00c86c..985a12b 100644 --- a/target-tilegx/cpu.c +++ b/target-tilegx/cpu.c @@ -114,7 +114,6 @@ static void tilegx_cpu_initfn(Object *obj) static bool tcg_initialized; cs->env_ptr = env; - cpu_exec_init(cs); if (tcg_enabled() && !tcg_initialized) { tcg_initialized = true; diff --git a/target-tricore/cpu.c b/target-tricore/cpu.c index 8eb8aae..93594e6 100644 --- a/target-tricore/cpu.c +++ b/target-tricore/cpu.c @@ -102,7 +102,6 @@ static void tricore_cpu_initfn(Object *obj) CPUTriCoreState *env = &cpu->env; cs->env_ptr = env; - cpu_exec_init(cs); if (tcg_enabled()) { tricore_tcg_init(); diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c index 14fef43..181033f 100644 --- a/target-unicore32/cpu.c +++ b/target-unicore32/cpu.c @@ -124,7 +124,6 @@ static void uc32_cpu_initfn(Object *obj) static bool inited; cs->env_ptr = env; - cpu_exec_init(cs); #ifdef CONFIG_USER_ONLY env->uncached_asr = ASR_MODE_USER; diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c index 85208b3..e3099db 100644 --- a/target-xtensa/cpu.c +++ b/target-xtensa/cpu.c @@ -124,7 +124,6 @@ static void xtensa_cpu_initfn(Object *obj) cs->env_ptr = env; env->config = xcc->config; - cpu_exec_init(cs); if (tcg_enabled() && !tcg_inited) { tcg_inited = true;