From patchwork Tue Sep 27 10:13:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Wang X-Patchwork-Id: 675506 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sjy562Tmzz9s3v for ; Tue, 27 Sep 2016 20:39:38 +1000 (AEST) Received: from localhost ([::1]:49436 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bopnU-0004cg-Ac for incoming@patchwork.ozlabs.org; Tue, 27 Sep 2016 06:39:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54458) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bopP7-0004SF-Vq for qemu-devel@nongnu.org; Tue, 27 Sep 2016 06:14:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bopP6-0004Rz-Vy for qemu-devel@nongnu.org; Tue, 27 Sep 2016 06:14:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:60058) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bopP6-0004RD-Pc for qemu-devel@nongnu.org; Tue, 27 Sep 2016 06:14:24 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 58A63C0528C1; Tue, 27 Sep 2016 10:14:24 +0000 (UTC) Received: from jason-ThinkPad-T450s.redhat.com (vpn1-6-155.pek2.redhat.com [10.72.6.155]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u8RAD8Jb010083; Tue, 27 Sep 2016 06:14:22 -0400 From: Jason Wang To: qemu-devel@nongnu.org Date: Tue, 27 Sep 2016 18:13:00 +0800 Message-Id: <1474971187-15627-21-git-send-email-jasowang@redhat.com> In-Reply-To: <1474971187-15627-1-git-send-email-jasowang@redhat.com> References: <1474971187-15627-1-git-send-email-jasowang@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Tue, 27 Sep 2016 10:14:24 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL V2 20/27] e1000e: Fix CTRL_EXT.EIAME behavior X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dmitry Fleytman , peter.maydell@linaro.org, Jason Wang Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Dmitry Fleytman CTRL_EXT.EIAME bit controls clearing of IAM bits, but current code clears IMS bits instead. See spec. 10.2.2.5 Extended Device Control Register. Signed-off-by: Dmitry Fleytman Signed-off-by: Jason Wang --- hw/net/e1000e_core.c | 4 ++-- hw/net/trace-events | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c index e8d50f6..a198a88 100644 --- a/hw/net/e1000e_core.c +++ b/hw/net/e1000e_core.c @@ -2008,8 +2008,8 @@ e1000e_msix_notify_one(E1000ECore *core, uint32_t cause, uint32_t int_cfg) } if (core->mac[CTRL_EXT] & E1000_CTRL_EXT_EIAME) { - trace_e1000e_irq_ims_clear_eiame(core->mac[IAM], cause); - e1000e_clear_ims_bits(core, core->mac[IAM] & cause); + trace_e1000e_irq_iam_clear_eiame(core->mac[IAM], cause); + core->mac[IAM] &= ~cause; } trace_e1000e_irq_icr_clear_eiac(core->mac[ICR], core->mac[EIAC]); diff --git a/hw/net/trace-events b/hw/net/trace-events index 47ab14a..1a5c909 100644 --- a/hw/net/trace-events +++ b/hw/net/trace-events @@ -223,7 +223,7 @@ e1000e_irq_icr_read_entry(uint32_t icr) "Starting ICR read. Current ICR: 0x%x" e1000e_irq_icr_read_exit(uint32_t icr) "Ending ICR read. Current ICR: 0x%x" e1000e_irq_icr_clear_zero_ims(void) "Clearing ICR on read due to zero IMS" e1000e_irq_icr_clear_iame(void) "Clearing ICR on read due to IAME" -e1000e_irq_ims_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" +e1000e_irq_iam_clear_eiame(uint32_t iam, uint32_t cause) "Clearing IMS due to EIAME, IAM: 0x%X, cause: 0x%X" e1000e_irq_icr_clear_eiac(uint32_t icr, uint32_t eiac) "Clearing ICR bits due to EIAC, ICR: 0x%X, EIAC: 0x%X" e1000e_irq_ims_clear_set_imc(uint32_t val) "Clearing IMS bits due to IMC write 0x%x" e1000e_irq_fire_delayed_interrupts(void) "Firing delayed interrupts"