From patchwork Thu Jul 28 14:28:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 653739 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3s0Z5s4HD8z9sD5 for ; Fri, 29 Jul 2016 00:30:41 +1000 (AEST) Received: from localhost ([::1]:53621 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSmKd-0000bI-99 for incoming@patchwork.ozlabs.org; Thu, 28 Jul 2016 10:30:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38262) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSmJC-0007pq-Fl for qemu-devel@nongnu.org; Thu, 28 Jul 2016 10:29:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bSmJ8-0005vI-Dd for qemu-devel@nongnu.org; Thu, 28 Jul 2016 10:29:10 -0400 Received: from 18.mo7.mail-out.ovh.net ([188.165.56.163]:44589) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bSmJ8-0005ul-3I for qemu-devel@nongnu.org; Thu, 28 Jul 2016 10:29:06 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo7.mail-out.ovh.net (Postfix) with ESMTP id 8AC5B1010457 for ; Thu, 28 Jul 2016 16:29:05 +0200 (CEST) Received: from hermes.ibm.com (LFbn-1-2234-107.w90-76.abo.wanadoo.fr [90.76.55.107]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 59FCE5C006E; Thu, 28 Jul 2016 16:29:00 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: Peter Maydell Date: Thu, 28 Jul 2016 16:28:15 +0200 Message-Id: <1469716099-8975-6-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1469716099-8975-1-git-send-email-clg@kaod.org> References: <1469716099-8975-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1635088142606371601 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeltddrieejgdejjecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 188.165.56.163 Subject: [Qemu-devel] [PATCH v2 5/9] palmetto-bmc: add board specific configuration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , qemu-arm@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" aspeed_init() now uses a board identifier to customize some values specific to the board, ram base, board revision number, etc. Signed-off-by: Cédric Le Goater --- Changes since v1: - changed aspeed_init() prototype to use a 'const AspeedBoardConfig *' - fixed white space issues hw/arm/aspeed.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 8a3ff5568575..80be55ab293f 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -22,8 +22,6 @@ #include "sysemu/blockdev.h" static struct arm_boot_info aspeed_binfo = { - .loader_start = AST2400_SDRAM_BASE, - .board_id = 0, .nb_cpus = 1, }; @@ -32,6 +30,21 @@ typedef struct AspeedBoardState { MemoryRegion ram; } AspeedBoardState; +typedef struct AspeedBoardConfig { + uint32_t hw_strap1; + uint32_t silicon_rev; + hwaddr sdram_base; +} AspeedBoardConfig; + +enum { + PALMETTO_BMC +}; + +static const AspeedBoardConfig aspeed_boards[] = { + [PALMETTO_BMC] = { 0x120CE416, AST2400_A0_SILICON_REV, + AST2400_SDRAM_BASE }, +}; + static void aspeed_init_flashes(AspeedSMCState *s, const char *flashtype, Error **errp) { @@ -58,7 +71,7 @@ static void aspeed_init_flashes(AspeedSMCState *s, const char *flashtype, } } -static void aspeed_init(MachineState *machine) +static void aspeed_init(MachineState *machine, const AspeedBoardConfig *cfg) { AspeedBoardState *bmc; @@ -68,13 +81,13 @@ static void aspeed_init(MachineState *machine) &error_abort); memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); - memory_region_add_subregion(get_system_memory(), AST2400_SDRAM_BASE, + memory_region_add_subregion(get_system_memory(), cfg->sdram_base, &bmc->ram); object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram), &error_abort); - object_property_set_int(OBJECT(&bmc->soc), 0x120CE416, "hw-strap1", - &error_abort); - object_property_set_int(OBJECT(&bmc->soc), AST2400_A0_SILICON_REV, + object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, + "hw-strap1", &error_abort); + object_property_set_int(OBJECT(&bmc->soc), cfg->silicon_rev, "silicon-rev", &error_abort); object_property_set_bool(OBJECT(&bmc->soc), true, "realized", &error_abort); @@ -86,13 +99,15 @@ static void aspeed_init(MachineState *machine) aspeed_binfo.initrd_filename = machine->initrd_filename; aspeed_binfo.kernel_cmdline = machine->kernel_cmdline; aspeed_binfo.ram_size = ram_size; + aspeed_binfo.loader_start = cfg->sdram_base, + aspeed_binfo.board_id = cfg->silicon_rev, arm_load_kernel(ARM_CPU(first_cpu), &aspeed_binfo); } static void palmetto_bmc_init(MachineState *machine) { machine->cpu_model = "arm926"; - aspeed_init(machine); + aspeed_init(machine, &aspeed_boards[PALMETTO_BMC]); } static void palmetto_bmc_class_init(ObjectClass *oc, void *data)