From patchwork Tue Jul 5 08:19:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 644593 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rkH6C2zb4z9sdn for ; Tue, 5 Jul 2016 18:26:25 +1000 (AEST) Received: from localhost ([::1]:53044 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bKLgU-0006Sj-Um for incoming@patchwork.ozlabs.org; Tue, 05 Jul 2016 04:26:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39281) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bKLaw-00067G-Sb for qemu-devel@nongnu.org; Tue, 05 Jul 2016 04:20:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bKLat-0001Q2-Hm for qemu-devel@nongnu.org; Tue, 05 Jul 2016 04:20:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41779) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bKLat-0001Pl-C1 for qemu-devel@nongnu.org; Tue, 05 Jul 2016 04:20:35 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id F0B0412B28; Tue, 5 Jul 2016 08:20:34 +0000 (UTC) Received: from pxdev.xzpeter.org (vpn1-4-112.pek2.redhat.com [10.72.4.112]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u658JcZS005634; Tue, 5 Jul 2016 04:20:28 -0400 From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 5 Jul 2016 16:19:06 +0800 Message-Id: <1467706769-12505-6-git-send-email-peterx@redhat.com> In-Reply-To: <1467706769-12505-1-git-send-email-peterx@redhat.com> References: <1467706769-12505-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 05 Jul 2016 08:20:35 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v11 05/28] x86-iommu: introduce "intremap" property X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, rkrcmar@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, pbonzini@redhat.com, marcel@redhat.com, imammedo@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Adding one property for intel-iommu devices to specify whether we should support interrupt remapping. By default, IR is disabled. To enable it, we should use (take Intel IOMMU as example): -device intel_iommu,intremap=on This property can be shared by Intel and future AMD IOMMUs. Signed-off-by: Peter Xu --- hw/i386/x86-iommu.c | 23 +++++++++++++++++++++++ include/hw/i386/x86-iommu.h | 1 + 2 files changed, 24 insertions(+) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index f395139..4280839 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -59,9 +59,32 @@ static void x86_iommu_class_init(ObjectClass *klass, void *data) dc->realize = x86_iommu_realize; } +static bool x86_iommu_intremap_prop_get(Object *o, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + return s->intr_supported; +} + +static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **errp) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + s->intr_supported = value; +} + +static void x86_iommu_instance_init(Object *o) +{ + X86IOMMUState *s = X86_IOMMU_DEVICE(o); + + /* By default, do not support IR */ + s->intr_supported = false; + object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get, + x86_iommu_intremap_prop_set, NULL); +} + static const TypeInfo x86_iommu_info = { .name = TYPE_X86_IOMMU_DEVICE, .parent = TYPE_SYS_BUS_DEVICE, + .instance_init = x86_iommu_instance_init, .instance_size = sizeof(X86IOMMUState), .class_init = x86_iommu_class_init, .class_size = sizeof(X86IOMMUClass), diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 581da16..10779c1 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -46,6 +46,7 @@ struct X86IOMMUClass { struct X86IOMMUState { SysBusDevice busdev; + bool intr_supported; /* Whether vIOMMU supports IR */ }; /**