From patchwork Tue May 17 07:15:29 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 622888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3r87tP5Mygz9snl for ; Tue, 17 May 2016 17:16:45 +1000 (AEST) Received: from localhost ([::1]:48780 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2ZFD-0002MC-Lq for incoming@patchwork.ozlabs.org; Tue, 17 May 2016 03:16:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42043) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2ZEj-0001KO-PS for qemu-devel@nongnu.org; Tue, 17 May 2016 03:16:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2ZEd-0008Ii-I3 for qemu-devel@nongnu.org; Tue, 17 May 2016 03:16:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46623) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2ZEd-0008IL-9H for qemu-devel@nongnu.org; Tue, 17 May 2016 03:16:07 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BD1336265B; Tue, 17 May 2016 07:16:06 +0000 (UTC) Received: from pxdev.xzpeter.org.com (dhcp-14-147.nay.redhat.com [10.66.14.147]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u4H7FvDj011252; Tue, 17 May 2016 03:16:02 -0400 From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 17 May 2016 15:15:29 +0800 Message-Id: <1463469353-25642-2-git-send-email-peterx@redhat.com> In-Reply-To: <1463469353-25642-1-git-send-email-peterx@redhat.com> References: <1463469353-25642-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Tue, 17 May 2016 07:16:06 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v7 01/25] acpi: enable INTR for DMAR report structure X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, rkrcmar@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, pbonzini@redhat.com, marcel@redhat.com, imammedo@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Introduce iommu_intr in MachineState to show whether IOMMU IR is enabled. By default, IR is off. In ACPI DMA remapping report structure, enable INTR flag when specified. Signed-off-by: Peter Xu --- hw/core/machine.c | 2 ++ hw/i386/acpi-build.c | 12 +++++++++--- include/hw/boards.h | 1 + include/hw/i386/intel_iommu.h | 2 ++ 4 files changed, 14 insertions(+), 3 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 6dbbc85..276ad61 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -382,6 +382,8 @@ static void machine_initfn(Object *obj) ms->kvm_shadow_mem = -1; ms->dump_guest_core = true; ms->mem_merge = true; + /* Disable interrupt remapping by default. */ + ms->iommu_intr = false; object_property_add_str(obj, "accel", machine_get_accel, machine_set_accel, NULL); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 279f0d7..ddc6f16 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2554,16 +2554,22 @@ build_mcfg_q35(GArray *table_data, GArray *linker, AcpiMcfgInfo *info) } static void -build_dmar_q35(GArray *table_data, GArray *linker) +build_dmar_q35(MachineState *ms, GArray *table_data, GArray *linker) { int dmar_start = table_data->len; AcpiTableDmar *dmar; AcpiDmarHardwareUnit *drhd; + uint8_t dmar_flags = 0; + + if (ms->iommu_intr) { + /* enable INTR for the IOMMU device */ + dmar_flags |= DMAR_REPORT_F_INTR; + } dmar = acpi_data_push(table_data, sizeof(*dmar)); dmar->host_address_width = VTD_HOST_ADDRESS_WIDTH - 1; - dmar->flags = 0; /* No intr_remap for now */ + dmar->flags = dmar_flags; /* DMAR Remapping Hardware Unit Definition structure */ drhd = acpi_data_push(table_data, sizeof(*drhd)); @@ -2724,7 +2730,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) } if (acpi_has_iommu()) { acpi_add_table(table_offsets, tables_blob); - build_dmar_q35(tables_blob, tables->linker); + build_dmar_q35(MACHINE(pcms), tables_blob, tables->linker); } if (pcms->acpi_nvdimm_state.is_enabled) { nvdimm_build_acpi(table_offsets, tables_blob, tables->linker); diff --git a/include/hw/boards.h b/include/hw/boards.h index 8d4fe56..43f4976 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -152,6 +152,7 @@ struct MachineState { bool igd_gfx_passthru; char *firmware; bool iommu; + bool iommu_intr; bool suppress_vmdesc; bool enforce_config_section; diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h index b024ffa..0d89796 100644 --- a/include/hw/i386/intel_iommu.h +++ b/include/hw/i386/intel_iommu.h @@ -44,6 +44,8 @@ #define VTD_HOST_ADDRESS_WIDTH 39 #define VTD_HAW_MASK ((1ULL << VTD_HOST_ADDRESS_WIDTH) - 1) +#define DMAR_REPORT_F_INTR (1) + typedef struct VTDContextEntry VTDContextEntry; typedef struct VTDContextCacheEntry VTDContextCacheEntry; typedef struct IntelIOMMUState IntelIOMMUState;