From patchwork Tue May 17 07:15:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Xu X-Patchwork-Id: 622906 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3r885N0W0kz9s3s for ; Tue, 17 May 2016 17:26:16 +1000 (AEST) Received: from localhost ([::1]:48875 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2ZOP-0006yD-Vj for incoming@patchwork.ozlabs.org; Tue, 17 May 2016 03:26:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42490) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2ZFq-0003hP-9n for qemu-devel@nongnu.org; Tue, 17 May 2016 03:17:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2ZFi-00009h-V1 for qemu-devel@nongnu.org; Tue, 17 May 2016 03:17:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46721) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2ZFi-00009I-PB for qemu-devel@nongnu.org; Tue, 17 May 2016 03:17:14 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6CA81C07584C; Tue, 17 May 2016 07:17:14 +0000 (UTC) Received: from pxdev.xzpeter.org.com (dhcp-14-147.nay.redhat.com [10.66.14.147]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u4H7FvE2011252; Tue, 17 May 2016 03:17:10 -0400 From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 17 May 2016 15:15:46 +0800 Message-Id: <1463469353-25642-19-git-send-email-peterx@redhat.com> In-Reply-To: <1463469353-25642-1-git-send-email-peterx@redhat.com> References: <1463469353-25642-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Tue, 17 May 2016 07:17:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v7 18/25] ioapic: register IOMMU IEC notifier for ioapic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ehabkost@redhat.com, mst@redhat.com, jasowang@redhat.com, rkrcmar@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, jan.kiszka@web.de, wexu@redhat.com, pbonzini@redhat.com, marcel@redhat.com, imammedo@redhat.com, davidkiarie4@gmail.com, rth@twiddle.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Let IOAPIC the first consumer of x86 IOMMU IEC invalidation notifiers. This is only used for split irqchip case, when vIOMMU receives IR invalidation requests, IOAPIC will be notified to update kernel irq routes. For simplicity, we just update all IOAPIC routes, even if the invalidated entries are not IOAPIC ones. Signed-off-by: Peter Xu --- hw/intc/ioapic.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index dafefd0..e924100 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -30,6 +30,7 @@ #include "sysemu/kvm.h" #include "target-i386/cpu.h" #include "hw/i386/apic-msidef.h" +#include "hw/i386/x86-iommu.h" //#define DEBUG_IOAPIC @@ -197,6 +198,14 @@ static void ioapic_update_kvm_routes(IOAPICCommonState *s) #endif } +static void ioapic_iec_notifier(void *private, bool global, + uint32_t index, uint32_t mask) +{ + IOAPICCommonState *s = (IOAPICCommonState *)private; + /* For simplicity, we just update all the routes */ + ioapic_update_kvm_routes(s); +} + void ioapic_eoi_broadcast(int vector) { IOAPICCommonState *s; @@ -363,6 +372,18 @@ static void ioapic_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, ioapic_set_irq, IOAPIC_NUM_PINS); ioapics[ioapic_no] = s; + +#ifdef CONFIG_KVM + if (kvm_irqchip_is_split()) { + X86IOMMUState *iommu = x86_iommu_get_default(); + if (iommu) { + /* Register this IOAPIC with IOMMU IEC notifier, so that + * when there are IR invalidates, we can be notified to + * update kernel IR cache. */ + x86_iommu_iec_register_notifier(iommu, ioapic_iec_notifier, s); + } + } +#endif } static void ioapic_class_init(ObjectClass *klass, void *data)