From patchwork Wed Mar 16 15:38:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 598483 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3qQFyv4yvkz9t3c for ; Thu, 17 Mar 2016 02:39:19 +1100 (AEDT) Received: from localhost ([::1]:57084 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agDXZ-00058M-Gb for incoming@patchwork.ozlabs.org; Wed, 16 Mar 2016 11:39:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agDX6-0004NV-T4 for qemu-devel@nongnu.org; Wed, 16 Mar 2016 11:38:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1agDX3-0003cE-Es for qemu-devel@nongnu.org; Wed, 16 Mar 2016 11:38:48 -0400 Received: from out11.biz.mail.alibaba.com ([205.204.114.131]:59788) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1agDX2-0003Zl-QH for qemu-devel@nongnu.org; Wed, 16 Mar 2016 11:38:45 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.07445956|-1; FP=0|0|0|0|0|-1|-1|-1; HT=e02c03275; MF=chengang@emindsoft.com.cn; NM=1; PH=DS; RN=8; RT=7; SR=0; TI=SMTPD_----4cFZAGp_1458142701; Received: from localhost.localdomain(mailfrom:chengang@emindsoft.com.cn ip:223.72.67.52) by smtp.aliyun-inc.com(10.147.42.198); Wed, 16 Mar 2016 23:38:27 +0800 From: chengang@emindsoft.com.cn To: rth@twiddle.net, peter.maydell@linaro.org, cmetcalf@ezchip.com, laurent@vivier.eu Date: Wed, 16 Mar 2016 23:38:06 +0800 Message-Id: <1458142686-4405-1-git-send-email-chengang@emindsoft.com.cn> X-Mailer: git-send-email 1.9.3 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x X-Received-From: 205.204.114.131 Cc: walt@tilera.com, qemu-devel@nongnu.org, Chen Gang Subject: [Qemu-devel] [PATCH] target-tilegx: Support dumping working flow instructions and registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Chen Gang It is only for debug and analyzing tilegx qemu related issues. Signed-off-by: Chen Gang --- target-tilegx/helper.c | 34 ++++++++++++++++++++++++++++++++++ target-tilegx/helper.h | 2 ++ target-tilegx/translate.c | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 73 insertions(+) diff --git a/target-tilegx/helper.c b/target-tilegx/helper.c index 616c5c7..c7cfe66 100644 --- a/target-tilegx/helper.c +++ b/target-tilegx/helper.c @@ -160,3 +160,37 @@ uint64_t helper_cmul2(uint64_t srca, uint64_t srcb, int shift, int round) return deposit32(realr >> shift, 16, 16, imagr >> shift); } + +extern char **debug_buf; + +#define DEBUG_DUMP_REGS + +static void dump_regs(CPUTLGState *env, int idx) +{ +#ifdef DEBUG_DUMP_REGS + int i; + + if (debug_buf[idx][2] == '\n') { + for (i = 0; i < TILEGX_R_COUNT; i++) { + if (!(i % 4)) { + fprintf(stderr, "\n"); + } + fprintf(stderr, "r%2.2u = %16.16lx, ", i, env->regs[i]); + } + fprintf(stderr, "\n"); + for (i = 0; i < TILEGX_SPR_COUNT; i++) { + if (!(i % 8)) { + fprintf(stderr, "\n"); + } + fprintf(stderr, "s%2.2u = %16.16lx, ", i, env->spregs[i]); + } + fprintf(stderr, "\n"); + } +#endif +} + +void helper_print_step(CPUTLGState *env, int idx) +{ + fprintf(stderr, "%s", debug_buf[idx]); + dump_regs(env, idx); +} diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h index 9281d0f..74f796a 100644 --- a/target-tilegx/helper.h +++ b/target-tilegx/helper.h @@ -24,3 +24,5 @@ DEF_HELPER_FLAGS_2(v1shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v2shl, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v2shru, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(v2shrs, TCG_CALL_NO_RWG_SE, i64, i64, i64) + +DEF_HELPER_2(print_step, void, env, int) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index 03918eb..8489494 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -47,6 +47,43 @@ static const char * const reg_names[64] = { "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn2", "zero" }; +#define STATIC_DEBUG + +char **debug_buf; + +#ifdef STATIC_DEBUG + +#include + +#define qemu_log_mask(flag, fmt, ...) debug_print(flag, fmt, ##__VA_ARGS__) + +static int debug_idx; + +extern void debug_print(int flag, const char *fmt, ...); + +void debug_print(int flag, const char *fmt, ...) +{ + va_list args; + char buf[0x400]; + TCGv_i32 tmp; + + va_start(args, fmt); + vsprintf(buf, fmt, args); + va_end(args); + + if (!debug_buf) { + debug_buf = malloc(sizeof(char *) * 0x400000); + } + debug_buf[debug_idx] = malloc(strlen(buf) + 1); + strcpy(debug_buf[debug_idx], buf); + + tmp = tcg_const_i32(debug_idx++); + gen_helper_print_step(cpu_env, tmp); + tcg_temp_free_i32(tmp); +} + +#endif + /* Modified registers are cached in temporaries until the end of the bundle. */ typedef struct { unsigned reg;