From patchwork Wed Mar 2 11:50:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Guangrong X-Patchwork-Id: 590962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 69825140BEB for ; Wed, 2 Mar 2016 22:53:11 +1100 (AEDT) Received: from localhost ([::1]:55852 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab5L3-00013d-JX for incoming@patchwork.ozlabs.org; Wed, 02 Mar 2016 06:53:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47016) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab5J0-0005Xt-PN for qemu-devel@nongnu.org; Wed, 02 Mar 2016 06:51:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ab5Iz-0007eP-Q9 for qemu-devel@nongnu.org; Wed, 02 Mar 2016 06:51:02 -0500 Received: from mga04.intel.com ([192.55.52.120]:15374) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ab5Iz-0007Vb-Ln for qemu-devel@nongnu.org; Wed, 02 Mar 2016 06:51:01 -0500 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP; 02 Mar 2016 03:51:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,528,1449561600"; d="scan'208";a="925101222" Received: from xiaoreal1.sh.intel.com (HELO xiaoreal1.sh.intel.com.sh.intel.com) ([10.239.48.79]) by orsmga002.jf.intel.com with ESMTP; 02 Mar 2016 03:50:59 -0800 From: Xiao Guangrong To: pbonzini@redhat.com, imammedo@redhat.com Date: Wed, 2 Mar 2016 19:50:41 +0800 Message-Id: <1456919441-101204-6-git-send-email-guangrong.xiao@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1456919441-101204-1-git-send-email-guangrong.xiao@linux.intel.com> References: <1456919441-101204-1-git-send-email-guangrong.xiao@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Cc: Xiao Guangrong , ehabkost@redhat.com, kvm@vger.kernel.org, mst@redhat.com, gleb@kernel.org, mtosatti@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, dan.j.williams@intel.com, rth@twiddle.net Subject: [Qemu-devel] [PATCH v5 5/5] nvdimm acpi: add _CRS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org As Igor suggested that we can report the BIOS patched operation region so that OSPM could see that particular range is in use and be able to notice conflicts if it happens some day Signed-off-by: Xiao Guangrong --- hw/acpi/nvdimm.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index 5a17ee2..43fd4c5 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -578,6 +578,7 @@ static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets, GArray *table_data, GArray *linker) { Aml *ssdt, *sb_scope, *dev, *field; + Aml *min_addr, *max_addr, *mr32, *method, *crs; int mem_addr_offset, nvdimm_ssdt; acpi_add_table(table_offsets, table_data); @@ -602,6 +603,32 @@ static void nvdimm_build_ssdt(GSList *device_list, GArray *table_offsets, */ aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012"))); + /* + * report the dsm memory so that OSPM could see that particular range is + * in use and be able to notice conflicts if it happens some day. + */ + method = aml_method("_CRS", 0, AML_SERIALIZED); + crs = aml_resource_template(); + aml_append(crs, aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, + AML_MAX_FIXED, AML_CACHEABLE, + AML_READ_WRITE, + 0, 0x0, 0xFFFFFFFE, 0, + TARGET_PAGE_SIZE)); + aml_append(method, aml_name_decl("MR32", crs)); + mr32 = aml_name("MR32"); + aml_append(method, aml_create_dword_field(mr32, aml_int(10), "MIN")); + aml_append(method, aml_create_dword_field(mr32, aml_int(14), "MAX")); + + min_addr = aml_name("MIN"); + max_addr = aml_name("MAX"); + + aml_append(method, aml_store(aml_name(NVDIMM_ACPI_MEM_ADDR), min_addr)); + aml_append(method, aml_add(min_addr, aml_int(TARGET_PAGE_SIZE), + max_addr)); + aml_append(method, aml_decrement(max_addr)); + aml_append(method, aml_return(mr32)); + aml_append(dev, method); + /* map DSM memory and IO into ACPI namespace. */ aml_append(dev, aml_operation_region("NPIO", AML_SYSTEM_IO, aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN));