From patchwork Sun Dec 6 16:11:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 553148 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0C8E91402EC for ; Mon, 7 Dec 2015 03:12:22 +1100 (AEDT) Received: from localhost ([::1]:50238 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a5bv9-0001Od-P2 for incoming@patchwork.ozlabs.org; Sun, 06 Dec 2015 11:12:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52238) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a5but-0000sW-0d for qemu-devel@nongnu.org; Sun, 06 Dec 2015 11:12:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1a5bus-0007Jw-3L for qemu-devel@nongnu.org; Sun, 06 Dec 2015 11:12:02 -0500 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:39999) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1a5bur-000794-U3 for qemu-devel@nongnu.org; Sun, 06 Dec 2015 11:12:02 -0500 Received: from weber.rr44.fr ([2001:bc8:30d7:120:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1a5bui-0003w6-3k; Sun, 06 Dec 2015 17:11:52 +0100 Received: from aurel32 by weber.rr44.fr with local (Exim 4.86) (envelope-from ) id 1a5buh-0004UA-R9; Sun, 06 Dec 2015 17:11:51 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Sun, 6 Dec 2015 17:11:49 +0100 Message-Id: <1449418309-17202-1-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.6.2 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:bc8:30d7:100::1 Cc: Leon Alrae , Aurelien Jarno Subject: [Qemu-devel] [PATCH] target-mips: silence NaNs for cvt.s.d and cvt.d.s X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org cvt.s.d and cvt.d.s are FP operations and thus need to convert input sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan functions for that as the floatXX_to_floatXX functions do not do that. Cc: Leon Alrae Signed-off-by: Aurelien Jarno --- target-mips/op_helper.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index d2c98c9..20e79be 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -2545,6 +2545,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, uint32_t fst0) uint64_t fdt2; fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status); + fdt2 = float64_maybe_silence_nan(fdt2); update_fcr31(env, GETPC()); return fdt2; } @@ -2634,6 +2635,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, uint64_t fdt0) uint32_t fst2; fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status); + fst2 = float32_maybe_silence_nan(fst2); update_fcr31(env, GETPC()); return fst2; }