From patchwork Fri Oct 30 05:56:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Guangrong X-Patchwork-Id: 538144 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B6A9F140E6F for ; Fri, 30 Oct 2015 17:10:14 +1100 (AEDT) Received: from localhost ([::1]:48661 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zs2tA-0002kK-E5 for incoming@patchwork.ozlabs.org; Fri, 30 Oct 2015 02:10:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56977) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zs2ls-0005Mc-Ap for qemu-devel@nongnu.org; Fri, 30 Oct 2015 02:02:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zs2lr-0007jP-3K for qemu-devel@nongnu.org; Fri, 30 Oct 2015 02:02:40 -0400 Received: from mga11.intel.com ([192.55.52.93]:19647) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zs2lq-0007g3-Us for qemu-devel@nongnu.org; Fri, 30 Oct 2015 02:02:39 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 29 Oct 2015 23:02:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,217,1444719600"; d="scan'208";a="590814172" Received: from xiaoreal1.sh.intel.com (HELO xiaoreal1.sh.intel.com.sh.intel.com) ([10.239.48.79]) by FMSMGA003.fm.intel.com with ESMTP; 29 Oct 2015 23:02:36 -0700 From: Xiao Guangrong To: pbonzini@redhat.com, imammedo@redhat.com Date: Fri, 30 Oct 2015 13:56:14 +0800 Message-Id: <1446184587-142784-21-git-send-email-guangrong.xiao@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1446184587-142784-1-git-send-email-guangrong.xiao@linux.intel.com> References: <1446184587-142784-1-git-send-email-guangrong.xiao@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Cc: Xiao Guangrong , ehabkost@redhat.com, kvm@vger.kernel.org, mst@redhat.com, gleb@kernel.org, mtosatti@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, dan.j.williams@intel.com, rth@twiddle.net Subject: [Qemu-devel] [PATCH v6 20/33] dimm: introduce realize callback X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org nvdimm need check if the backend memory is large enough to contain label data and init its memory region when the device is realized, so introduce realize callback which is called after common dimm has been realize Signed-off-by: Xiao Guangrong Reviewed-by: Vladimir Sementsov-Ogievskiy --- hw/mem/dimm.c | 5 +++++ include/hw/mem/dimm.h | 1 + 2 files changed, 6 insertions(+) diff --git a/hw/mem/dimm.c b/hw/mem/dimm.c index 44447d1..0ae23ce 100644 --- a/hw/mem/dimm.c +++ b/hw/mem/dimm.c @@ -426,6 +426,7 @@ static void dimm_init(Object *obj) static void dimm_realize(DeviceState *dev, Error **errp) { DIMMDevice *dimm = DIMM(dev); + DIMMDeviceClass *ddc = DIMM_GET_CLASS(dimm); if (!dimm->hostmem) { error_setg(errp, "'" DIMM_MEMDEV_PROP "' property is not set"); @@ -438,6 +439,10 @@ static void dimm_realize(DeviceState *dev, Error **errp) dimm->node, nb_numa_nodes ? nb_numa_nodes : 1); return; } + + if (ddc->realize) { + ddc->realize(dimm, errp); + } } static void dimm_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/mem/dimm.h b/include/hw/mem/dimm.h index 50f768a..72ec24c 100644 --- a/include/hw/mem/dimm.h +++ b/include/hw/mem/dimm.h @@ -65,6 +65,7 @@ typedef struct DIMMDeviceClass { DeviceClass parent_class; /* public */ + void (*realize)(DIMMDevice *dimm, Error **errp); MemoryRegion *(*get_memory_region)(DIMMDevice *dimm); } DIMMDeviceClass;