From patchwork Fri Oct 23 13:56:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 535003 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 00EA2141341 for ; Sat, 24 Oct 2015 01:02:22 +1100 (AEDT) Received: from localhost ([::1]:38680 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpcvD-0007wV-EP for incoming@patchwork.ozlabs.org; Fri, 23 Oct 2015 10:02:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51363) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpcqL-000841-AM for qemu-devel@nongnu.org; Fri, 23 Oct 2015 09:57:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZpcqF-00006D-Na for qemu-devel@nongnu.org; Fri, 23 Oct 2015 09:57:17 -0400 Received: from s16892447.onlinehome-server.info ([82.165.15.123]:50342) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZpcqF-00005v-Gt; Fri, 23 Oct 2015 09:57:11 -0400 Received: from [87.252.56.82] (helo=kentang.home.gateway) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1ZpcqD-0008H8-Vi; Fri, 23 Oct 2015 14:57:10 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de, david@gibson.dropbear.id.au, cormac@c-obrien.org Date: Fri, 23 Oct 2015 14:56:33 +0100 Message-Id: <1445608598-24485-9-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1445608598-24485-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1445608598-24485-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 87.252.56.82 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 08/13] cuda.c: fix CUDA SR interrupt clearing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Make sure that we also clear the data and clock interrupts at the same time. Signed-off-by: Mark Cave-Ayland --- hw/misc/macio/cuda.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index d3ec58a..4027713 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -57,6 +57,8 @@ #define IER_SET 0x80 /* set bits in IER */ #define IER_CLR 0 /* clear bits in IER */ #define SR_INT 0x04 /* Shift register full/empty */ +#define SR_DATA_INT 0x08 +#define SR_CLOCK_INT 0x10 #define T1_INT 0x40 /* Timer 1 interrupt */ #define T2_INT 0x20 /* Timer 2 interrupt */ @@ -261,7 +263,7 @@ static uint32_t cuda_readb(void *opaque, hwaddr addr) break; case 10: val = s->sr; - s->ifr &= ~SR_INT; + s->ifr &= ~(SR_INT | SR_CLOCK_INT | SR_DATA_INT); cuda_update_irq(s); break; case 11: