From patchwork Mon Oct 19 00:54:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Guangrong X-Patchwork-Id: 531984 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id EC4481402D1 for ; Mon, 19 Oct 2015 04:15:24 +1100 (AEDT) Received: from localhost ([::1]:34815 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZnrYI-0007Gw-NS for incoming@patchwork.ozlabs.org; Sun, 18 Oct 2015 13:15:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42929) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZnrJw-0008FB-Q0 for qemu-devel@nongnu.org; Sun, 18 Oct 2015 13:00:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZnrJv-0000PQ-8c for qemu-devel@nongnu.org; Sun, 18 Oct 2015 13:00:32 -0400 Received: from mga09.intel.com ([134.134.136.24]:58036) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZnrJu-0000CK-Sn for qemu-devel@nongnu.org; Sun, 18 Oct 2015 13:00:31 -0400 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 18 Oct 2015 10:00:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,698,1437462000"; d="scan'208";a="583275956" Received: from xiaoreal1.sh.intel.com (HELO xiaoreal1.sh.intel.com.sh.intel.com) ([10.239.48.79]) by FMSMGA003.fm.intel.com with ESMTP; 18 Oct 2015 10:00:28 -0700 From: Xiao Guangrong To: pbonzini@redhat.com, imammedo@redhat.com Date: Mon, 19 Oct 2015 08:54:12 +0800 Message-Id: <1445216059-88521-27-git-send-email-guangrong.xiao@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1445216059-88521-1-git-send-email-guangrong.xiao@linux.intel.com> References: <1445216059-88521-1-git-send-email-guangrong.xiao@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.24 Cc: Xiao Guangrong , ehabkost@redhat.com, kvm@vger.kernel.org, mst@redhat.com, gleb@kernel.org, mtosatti@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, dan.j.williams@intel.com, rth@twiddle.net Subject: [Qemu-devel] [PATCH v4 26/33] nvdimm acpi: build ACPI nvdimm devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org NVDIMM devices is defined in ACPI 6.0 9.20 NVDIMM Devices There is a root device under \_SB and specified NVDIMM devices are under the root device. Each NVDIMM device has _ADR which returns its handle used to associate MEMDEV structure in NFIT We reserve handle 0 for root device. In this patch, we save handle, arg0, arg1 and arg2. Arg3 is conditionally saved in later patch Signed-off-by: Xiao Guangrong --- hw/acpi/nvdimm.c | 216 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 216 insertions(+) diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index bc28828..7e99889 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -408,15 +408,38 @@ static void nvdimm_build_nfit(GArray *structures, GArray *table_offsets, sizeof(nfit) + structures->len, 1); } +/* detailed _DSM design please refer to docs/specs/acpi_nvdimm.txt */ +#define NOTIFY_VALUE 0x99 + +struct dsm_in { + uint32_t handle; + uint32_t revision; + uint32_t function; + /* the remaining size in the page is used by arg3. */ + uint8_t arg3[0]; +} QEMU_PACKED; +typedef struct dsm_in dsm_in; + +struct dsm_out { + /* the size of buffer filled by QEMU. */ + uint32_t len; + uint8_t data[0]; +} QEMU_PACKED; +typedef struct dsm_out dsm_out; + static uint64_t nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size) { + fprintf(stderr, "BUG: we never read DSM notification MMIO.\n"); return 0; } static void nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) { + if (val != NOTIFY_VALUE) { + fprintf(stderr, "BUG: unexepected notify value 0x%" PRIx64, val); + } } static const MemoryRegionOps nvdimm_dsm_ops = { @@ -475,6 +498,196 @@ static MemoryRegion *nvdimm_build_dsm_memory(NVDIMMState *state) return dsm_fit_mr; } +#define BUILD_STA_METHOD(_dev_, _method_) \ + do { \ + _method_ = aml_method("_STA", 0); \ + aml_append(_method_, aml_return(aml_int(0x0f))); \ + aml_append(_dev_, _method_); \ + } while (0) + +#define BUILD_DSM_METHOD(_dev_, _method_, _handle_, _errcode_, _uuid_) \ + do { \ + Aml *ifctx, *uuid; \ + _method_ = aml_method("_DSM", 4); \ + /* check UUID if it is we expect, return the errorcode if not.*/ \ + uuid = aml_touuid(_uuid_); \ + ifctx = aml_if(aml_lnot(aml_equal(aml_arg(0), uuid))); \ + aml_append(ifctx, aml_return(aml_int(_errcode_))); \ + aml_append(method, ifctx); \ + aml_append(method, aml_return(aml_call4("NCAL", aml_int(_handle_), \ + aml_arg(1), aml_arg(2), aml_arg(3)))); \ + aml_append(_dev_, _method_); \ + } while (0) + +#define BUILD_FIELD_UNIT_STRUCT(_field_, _s_, _f_, _name_) \ + aml_append(_field_, aml_named_field(_name_, \ + sizeof(typeof_field(_s_, _f_)) * BITS_PER_BYTE)) + +#define BUILD_FIELD_UNIT_SIZE(_field_, _byte_, _name_) \ + aml_append(_field_, aml_named_field(_name_, (_byte_) * BITS_PER_BYTE)) + +static void build_nvdimm_devices(NVDIMMState *state, GSList *device_list, + Aml *root_dev) +{ + for (; device_list; device_list = device_list->next) { + NVDIMMDevice *nvdimm = device_list->data; + int slot = object_property_get_int(OBJECT(nvdimm), DIMM_SLOT_PROP, + NULL); + uint32_t handle = nvdimm_slot_to_handle(slot); + Aml *dev, *method; + + dev = aml_device("NV%02X", slot); + aml_append(dev, aml_name_decl("_ADR", aml_int(handle))); + + BUILD_STA_METHOD(dev, method); + + /* + * Please refer to DSM specification Chapter 4 _DSM Interface + * for NVDIMM Device (non-root) - Example + */ + BUILD_DSM_METHOD(dev, method, + handle /* NVDIMM Device Handle */, + 3 /* Invalid Input Parameters */, + "4309AC30-0D11-11E4-9191-0800200C9A66" + /* UUID for NVDIMM Devices. */); + + aml_append(root_dev, dev); + } +} + +static void nvdimm_build_acpi_devices(NVDIMMState *state, GSList *device_list, + Aml *sb_scope) +{ + Aml *dev, *method, *field; + uint64_t page_size = getpagesize(); + int fit_size = nvdimm_device_structure_size(g_slist_length(device_list)); + + dev = aml_device("NVDR"); + aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012"))); + + /* map DSM memory into ACPI namespace. */ + aml_append(dev, aml_operation_region("NMIO", AML_SYSTEM_MEMORY, + state->base, page_size)); + aml_append(dev, aml_operation_region("NRAM", AML_SYSTEM_MEMORY, + state->base + page_size, page_size)); + aml_append(dev, aml_operation_region("NFIT", AML_SYSTEM_MEMORY, + state->base + page_size * 2, + memory_region_size(&state->mr) - page_size * 2)); + + /* + * DSM notifier: + * @NOTI: write value to it will notify QEMU that _DSM method is being + * called and the parameters can be found in dsm_in. + * + * It is MMIO mapping on host so that it will cause VM-exit then QEMU + * gets control. + */ + field = aml_field("NMIO", AML_DWORD_ACC, AML_PRESERVE); + BUILD_FIELD_UNIT_SIZE(field, sizeof(uint32_t), "NOTI"); + aml_append(dev, field); + + /* + * DSM input: + * @HDLE: store device's handle, it's zero if the _DSM call happens + * on ROOT. + * @ARG0 ~ @ARG3: store the parameters of _DSM call. + * + * They are ram mapping on host so that these accesses never cause + * VM-EXIT. + */ + field = aml_field("NRAM", AML_DWORD_ACC, AML_PRESERVE); + BUILD_FIELD_UNIT_STRUCT(field, dsm_in, handle, "HDLE"); + BUILD_FIELD_UNIT_STRUCT(field, dsm_in, revision, "REVS"); + BUILD_FIELD_UNIT_STRUCT(field, dsm_in, function, "FUNC"); + BUILD_FIELD_UNIT_SIZE(field, page_size - offsetof(dsm_in, arg3), + "ARG3"); + aml_append(dev, field); + + /* + * DSM output: + * @RLEN: the size of buffer filled by QEMU + * @ODAT: the buffer QEMU uses to store the result + * + * Since the page is reused by both input and out, the input data + * will be lost after storing new result into @RLEN and @ODAT + */ + field = aml_field("NRAM", AML_DWORD_ACC, AML_PRESERVE); + BUILD_FIELD_UNIT_STRUCT(field, dsm_out, len, "RLEN"); + BUILD_FIELD_UNIT_SIZE(field, page_size - offsetof(dsm_out, data), + "ODAT"); + aml_append(dev, field); + + /* @RFIT, returned by _FIT method. */ + field = aml_field("NFIT", AML_DWORD_ACC, AML_PRESERVE); + BUILD_FIELD_UNIT_SIZE(field, fit_size, "RFIT"); + aml_append(dev, field); + + method = aml_method_serialized("NCAL", 4); + { + aml_append(method, aml_store(aml_arg(0), aml_name("HDLE"))); + aml_append(method, aml_store(aml_arg(1), aml_name("REVS"))); + aml_append(method, aml_store(aml_arg(2), aml_name("FUNC"))); + + aml_append(method, aml_store(aml_int(NOTIFY_VALUE), aml_name("NOTI"))); + + aml_append(method, aml_store(aml_name("RLEN"), aml_local(6))); + aml_append(method, aml_store(aml_shiftleft(aml_local(6), + aml_int(3)), aml_local(6))); + aml_append(method, aml_create_field(aml_name("ODAT"), aml_int(0), + aml_local(6) , "OBUF")); + aml_append(method, aml_name_decl("ZBUF", aml_buffer(0, NULL))); + aml_append(method, aml_concatenate(aml_name("ZBUF"), + aml_name("OBUF"), aml_arg(6))); + aml_append(method, aml_return(aml_arg(6))); + } + aml_append(dev, method); + + BUILD_STA_METHOD(dev, method); + + /* + * please refer to DSM specification Chapter 3 _DSM Interface for + * NVDIMM Root Device - Example + */ + BUILD_DSM_METHOD(dev, method, + 0 /* 0 is reserved for NVDIMM Root Device*/, + 2 /* Invalid Input Parameters */, + "2F10E7A4-9E91-11E4-89D3-123B93F75CBA" + /* UUID for NVDIMM Root Devices. */); + + method = aml_method("_FIT", 0); + { + aml_append(method, aml_return(aml_name("RFIT"))); + } + aml_append(dev, method); + + build_nvdimm_devices(state, device_list, dev); + + aml_append(sb_scope, dev); +} + +static void nvdimm_build_ssdt(NVDIMMState *state, GSList *device_list, + GArray *table_offsets, GArray *table_data, + GArray *linker) +{ + Aml *ssdt, *sb_scope; + + acpi_add_table(table_offsets, table_data); + + ssdt = init_aml_allocator(); + acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader)); + + sb_scope = aml_scope("\\_SB"); + nvdimm_build_acpi_devices(state, device_list, sb_scope); + + aml_append(ssdt, sb_scope); + /* copy AML table into ACPI tables blob and patch header there */ + g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len); + build_header(linker, table_data, + (void *)(table_data->data + table_data->len - ssdt->buf->len), + "SSDT", ssdt->buf->len, 1); + free_aml_allocator(); +} + void nvdimm_build_acpi(NVDIMMState *state, GArray *table_offsets, GArray *table_data, GArray *linker) { @@ -502,6 +715,9 @@ void nvdimm_build_acpi(NVDIMMState *state, GArray *table_offsets, nvdimm_build_nfit(structures, table_offsets, table_data, linker); + nvdimm_build_ssdt(state, device_list, table_offsets, table_data, + linker); + memory_region_unref(fit_mr); g_slist_free(device_list); g_array_free(structures, true);