From patchwork Tue Oct 6 17:49:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 526996 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:4830:134:3::10]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9A9CF140D96 for ; Wed, 7 Oct 2015 08:10:40 +1100 (AEDT) Received: from lists.gnu.org ([208.118.235.17]:33657) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZjWPt-0008Fb-C7 for incoming@patchwork.ozlabs.org; Tue, 06 Oct 2015 13:52:45 -0400 Received: from localhost ([::1]:52991 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZjWPt-0007ub-Al for incoming@patchwork.ozlabs.org; Tue, 06 Oct 2015 13:52:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40431) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZjWNz-0005VZ-Ov for qemu-devel@nongnu.org; Tue, 06 Oct 2015 13:51:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZjWNL-000706-QJ for qemu-devel@nongnu.org; Tue, 06 Oct 2015 13:50:47 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:56088) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZjWNL-0006yN-HP for qemu-devel@nongnu.org; Tue, 06 Oct 2015 13:50:07 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id CD1A01418D5; Tue, 6 Oct 2015 17:50:06 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id BCF811418E2; Tue, 6 Oct 2015 17:50:06 +0000 (UTC) Received: from keeshans.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 5EF041418DA; Tue, 6 Oct 2015 17:50:05 +0000 (UTC) From: Christopher Covington To: drjones@redhat.com, qemu-devel@nongnu.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, wei@redhat.com Date: Tue, 6 Oct 2015 13:49:25 -0400 Message-Id: <1444153766-12532-3-git-send-email-cov@codeaurora.org> X-Mailer: git-send-email 1.8.1.1 In-Reply-To: <1444153766-12532-1-git-send-email-cov@codeaurora.org> References: <5612EDA5.9010506@redhat.com> <1444153766-12532-1-git-send-email-cov@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 198.145.29.96 Cc: alindsay@codeaurora.org, croberts@codeaurora.org, Christopher Covington , shannon.zhao@linaro.org, alistair.francis@xilinx.com Subject: [Qemu-devel] [kvm-unit-tests PATCHv3 2/3] arm: pmu: Check cycle count increases X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, even for the smallest delta of two subsequent reads. Signed-off-by: Christopher Covington --- arm/pmu.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arm/pmu.c b/arm/pmu.c index 91a3688..589e605 100644 --- a/arm/pmu.c +++ b/arm/pmu.c @@ -33,6 +33,8 @@ struct pmu_data { }; }; +static const int samples = 10; + /* As a simple sanity check on the PMCR_EL0, ensure the implementer field isn't * null. Also print out a couple other interesting fields for diagnostic * purposes. For example, as of fall 2015, QEMU TCG mode doesn't implement @@ -56,11 +58,38 @@ static bool check_pmcr(void) return false; } +/* Ensure that the cycle counter progresses between back-to-back reads. + */ +static bool check_cycles_increase(void) +{ + struct pmu_data pmcr; + + pmcr.enable = 1; + asm volatile("msr pmcr_el0, %0" : : "r" (pmcr)); + + for (int i = 0; i < samples; i++) { + int a, b; + + asm volatile( + "mrs %[a], pmccntr_el0\n" + "mrs %[b], pmccntr_el0\n" + : [a] "=r" (a), [b] "=r" (b)); + + if (a >= b) { + printf("Read %d then %d.\n", a, b); + return false; + } + } + + return true; +} + int main(void) { report_prefix_push("pmu"); report("Control register", check_pmcr()); + report("Monotonically increasing cycle count", check_cycles_increase()); return report_summary(); }