From patchwork Thu Oct 1 19:47:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 525284 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id C4894140788 for ; Fri, 2 Oct 2015 05:52:24 +1000 (AEST) Received: from localhost ([::1]:55931 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zhjtu-0007DQ-K2 for incoming@patchwork.ozlabs.org; Thu, 01 Oct 2015 15:52:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58660) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZhjpJ-0008GY-H9 for qemu-devel@nongnu.org; Thu, 01 Oct 2015 15:47:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZhjpG-0005Rn-Ad for qemu-devel@nongnu.org; Thu, 01 Oct 2015 15:47:37 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:58528) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZhjpG-0005RR-67 for qemu-devel@nongnu.org; Thu, 01 Oct 2015 15:47:34 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id AEA5A141949; Thu, 1 Oct 2015 19:47:33 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 9D1F8141947; Thu, 1 Oct 2015 19:47:33 +0000 (UTC) Received: from keeshans.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 60F59141946; Thu, 1 Oct 2015 19:47:32 +0000 (UTC) From: Christopher Covington To: drjones@redhat.com, qemu-devel@nongnu.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu Date: Thu, 1 Oct 2015 15:47:21 -0400 Message-Id: <1443728841-10501-1-git-send-email-cov@codeaurora.org> X-Mailer: git-send-email 1.8.1.1 X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 198.145.29.96 Cc: shannon.zhao@linaro.org, Christopher Covington Subject: [Qemu-devel] [PATCH] arm: Add PMU test X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Beginning with just a read of the control register, add plumbing for testing the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington --- arm/pmu.c | 31 +++++++++++++++++++++++++++++++ arm/unittests.cfg | 5 +++++ config/config-arm-common.mak | 4 +++- 3 files changed, 39 insertions(+), 1 deletion(-) create mode 100644 arm/pmu.c diff --git a/arm/pmu.c b/arm/pmu.c new file mode 100644 index 0000000..b1e3c7a --- /dev/null +++ b/arm/pmu.c @@ -0,0 +1,31 @@ +#include "libcflat.h" + +union pmcr_el0 { + struct { + unsigned int implementor:8; + unsigned int identification_code:8; + unsigned int num_counters:5; + unsigned int zeros:4; + unsigned int cycle_counter_long:1; + unsigned int cycle_counter_disable_when_prohibited:1; + unsigned int event_counter_export:1; + unsigned int cycle_counter_clock_divider:1; + unsigned int cycle_counter_reset:1; + unsigned int event_counter_reset:1; + unsigned int enable:1; + } split; + uint32_t full; +}; + +int main() +{ + union pmcr_el0 pmcr; + + asm volatile("mrs %0, pmcr_el0\n" : "=r" (pmcr)); + + printf("PMU implementor: 0x%x\n", pmcr.split.implementor); + printf("Identification code: 0x%x\n", pmcr.split.identification_code); + printf("Event counters: %d\n", pmcr.split.num_counters); + + return report_summary(); +} diff --git a/arm/unittests.cfg b/arm/unittests.cfg index e068a0c..d3deb6a 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -35,3 +35,8 @@ file = selftest.flat smp = `getconf _NPROCESSORS_CONF` extra_params = -append 'smp' groups = selftest + +# Test PMU support +[pmu] +file = pmu.flat +groups = pmu diff --git a/config/config-arm-common.mak b/config/config-arm-common.mak index 698555d..b34d04c 100644 --- a/config/config-arm-common.mak +++ b/config/config-arm-common.mak @@ -11,7 +11,8 @@ endif tests-common = \ $(TEST_DIR)/selftest.flat \ - $(TEST_DIR)/spinlock-test.flat + $(TEST_DIR)/spinlock-test.flat \ + $(TEST_DIR)/pmu.flat all: test_cases @@ -70,3 +71,4 @@ test_cases: $(generated_files) $(tests-common) $(tests) $(TEST_DIR)/selftest.elf: $(cstart.o) $(TEST_DIR)/selftest.o $(TEST_DIR)/spinlock-test.elf: $(cstart.o) $(TEST_DIR)/spinlock-test.o +$(TEST_DIR)/pmu.elf: $(cstart.o) $(TEST_DIR)/pmu.o