From patchwork Thu Oct 1 13:49:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 525184 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D77EB140D70 for ; Fri, 2 Oct 2015 02:39:52 +1000 (AEST) Received: from localhost ([::1]:53177 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zhgta-0007vQ-UP for incoming@patchwork.ozlabs.org; Thu, 01 Oct 2015 12:39:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41539) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZheFb-0001mz-VL for qemu-devel@nongnu.org; Thu, 01 Oct 2015 09:50:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZheFV-0006LC-2s for qemu-devel@nongnu.org; Thu, 01 Oct 2015 09:50:23 -0400 Received: from smtpbg63.qq.com ([103.7.29.150]:7786) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZheFT-0006I9-PS for qemu-devel@nongnu.org; Thu, 01 Oct 2015 09:50:17 -0400 X-QQ-mid: esmtp38t1443707390t620t24886 Received: from localhost.localdomain.localdoma (unknown [223.72.67.87]) by esmtp5.qq.com (ESMTP) with id ; Thu, 01 Oct 2015 21:49:49 +0800 (CST) X-QQ-SSF: 01000000000000F0FH700F00002000H X-QQ-FEAT: Gf8h89u9tNy/bAEzGJTvMLDOggqEXDEEAMrKmAKWYZeVx1Hh2SOD5qai4NX8A EpXobc6/bUbN4pDubIi0bv7qv44a7+ssbJfygHVcNboVbSdS4FHMgxbYcKBdqA5Wz7iu2kJ wssJo01ybztI/AmFz2sL8S+cfZ8Y4MjXaV3t18m9WVoODU8sHY7yRxBnuAo4Brtpt9g2cZ+ UmoOqVakuHQcnyrX8Wy9jrfx7dC/EozQbdKMG7TLmPllDkBUAXkU8 X-QQ-GoodBg: 0 X-QQ-CSender: gang.chen.5i5j@qq.com From: gang.chen.5i5j@gmail.com To: peter.maydell@linaro.org, rth@twiddle.net Date: Thu, 1 Oct 2015 21:49:48 +0800 Message-Id: <1443707388-5177-1-git-send-email-gang.chen.5i5j@gmail.com> X-Mailer: git-send-email 1.9.3 X-QQ-SENDSIZE: 520 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 103.7.29.150 Cc: cmetcalf@ezchip.com, qemu-devel@nongnu.org, xili_gchen_5257@hotmail.com, Chen Gang Subject: [Qemu-devel] [PATCH] target-tilegx: Call dest_gr() later when have to use it X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Chen Gang When a nop instruction is generated, but the 'dest' is a valid (e.g. for any qemu skipped instructions, but still be useful in real machine), always allocate dest_gr() will cause issue for these nop instructions. After fix this issue, the temporary implementation of floating point instructions (which have skipped instructions) can work correctlly. Signed-off-by: Chen Gang --- target-tilegx/translate.c | 214 +++++++++++++++++++++++++++------------------- 1 file changed, 127 insertions(+), 87 deletions(-) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index b7bb4f3..2ca5d43 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -30,6 +30,8 @@ #define FMT64X "%016" PRIx64 +#define TDEST dest_gr(dc, dest) + static TCGv_ptr cpu_env; static TCGv cpu_pc; static TCGv cpu_regs[TILEGX_R_COUNT]; @@ -547,18 +549,17 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext, return ret; } - tdest = dest_gr(dc, dest); tsrca = load_gr(dc, srca); switch (opext) { case OE_RR_X0(CNTLZ): case OE_RR_Y0(CNTLZ): - gen_helper_cntlz(tdest, tsrca); + gen_helper_cntlz(TDEST, tsrca); mnemonic = "cntlz"; break; case OE_RR_X0(CNTTZ): case OE_RR_Y0(CNTTZ): - gen_helper_cnttz(tdest, tsrca); + gen_helper_cnttz(TDEST, tsrca); mnemonic = "cnttz"; break; case OE_RR_X0(FSINGLE_PACK1): @@ -631,10 +632,11 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext, mnemonic = "ld"; do_load: if (!prefetch_nofault) { - tcg_gen_qemu_ld_tl(tdest, tsrca, dc->mmuidx, memop); + tcg_gen_qemu_ld_tl(TDEST, tsrca, dc->mmuidx, memop); } break; case OE_RR_X1(LDNA): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrca, ~7); tcg_gen_qemu_ld_tl(tdest, tdest, dc->mmuidx, MO_TEQ); mnemonic = "ldna"; @@ -644,22 +646,22 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext, if (srca) { return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; } - tcg_gen_movi_tl(tdest, dc->pc + TILEGX_BUNDLE_SIZE_IN_BYTES); + tcg_gen_movi_tl(TDEST, dc->pc + TILEGX_BUNDLE_SIZE_IN_BYTES); mnemonic = "lnk"; break; case OE_RR_X0(PCNT): case OE_RR_Y0(PCNT): - gen_helper_pcnt(tdest, tsrca); + gen_helper_pcnt(TDEST, tsrca); mnemonic = "pcnt"; break; case OE_RR_X0(REVBITS): case OE_RR_Y0(REVBITS): - gen_helper_revbits(tdest, tsrca); + gen_helper_revbits(TDEST, tsrca); mnemonic = "revbits"; break; case OE_RR_X0(REVBYTES): case OE_RR_Y0(REVBYTES): - tcg_gen_bswap64_tl(tdest, tsrca); + tcg_gen_bswap64_tl(TDEST, tsrca); mnemonic = "revbytes"; break; case OE_RR_X0(TBLIDXB0): @@ -682,7 +684,7 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned opext, static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, unsigned dest, unsigned srca, unsigned srcb) { - TCGv tdest = dest_gr(dc, dest); + TCGv tdest; TCGv tsrca = load_gr(dc, srca); TCGv tsrcb = load_gr(dc, srcb); TCGv t0; @@ -691,13 +693,14 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, switch (opext) { case OE_RRR(ADDXSC, 0, X0): case OE_RRR(ADDXSC, 0, X1): - gen_saturate_op(tdest, tsrca, tsrcb, tcg_gen_add_tl); + gen_saturate_op(TDEST, tsrca, tsrcb, tcg_gen_add_tl); mnemonic = "addxsc"; break; case OE_RRR(ADDX, 0, X0): case OE_RRR(ADDX, 0, X1): case OE_RRR(ADDX, 0, Y0): case OE_RRR(ADDX, 0, Y1): + tdest = dest_gr(dc, dest); tcg_gen_add_tl(tdest, tsrca, tsrcb); tcg_gen_ext32s_tl(tdest, tdest); mnemonic = "addx"; @@ -706,25 +709,25 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(ADD, 0, X1): case OE_RRR(ADD, 0, Y0): case OE_RRR(ADD, 0, Y1): - tcg_gen_add_tl(tdest, tsrca, tsrcb); + tcg_gen_add_tl(TDEST, tsrca, tsrcb); mnemonic = "add"; break; case OE_RRR(AND, 0, X0): case OE_RRR(AND, 0, X1): case OE_RRR(AND, 5, Y0): case OE_RRR(AND, 5, Y1): - tcg_gen_and_tl(tdest, tsrca, tsrcb); + tcg_gen_and_tl(TDEST, tsrca, tsrcb); mnemonic = "and"; break; case OE_RRR(CMOVEQZ, 0, X0): case OE_RRR(CMOVEQZ, 4, Y0): - tcg_gen_movcond_tl(TCG_COND_EQ, tdest, tsrca, load_zero(dc), + tcg_gen_movcond_tl(TCG_COND_EQ, TDEST, tsrca, load_zero(dc), tsrcb, load_gr(dc, dest)); mnemonic = "cmoveqz"; break; case OE_RRR(CMOVNEZ, 0, X0): case OE_RRR(CMOVNEZ, 4, Y0): - tcg_gen_movcond_tl(TCG_COND_NE, tdest, tsrca, load_zero(dc), + tcg_gen_movcond_tl(TCG_COND_NE, TDEST, tsrca, load_zero(dc), tsrcb, load_gr(dc, dest)); mnemonic = "cmovnez"; break; @@ -732,16 +735,16 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(CMPEQ, 0, X1): case OE_RRR(CMPEQ, 3, Y0): case OE_RRR(CMPEQ, 3, Y1): - tcg_gen_setcond_tl(TCG_COND_EQ, tdest, tsrca, tsrcb); + tcg_gen_setcond_tl(TCG_COND_EQ, TDEST, tsrca, tsrcb); mnemonic = "cmpeq"; break; case OE_RRR(CMPEXCH4, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_CMPEXCH4); mnemonic = "cmpexch4"; break; case OE_RRR(CMPEXCH, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_CMPEXCH); mnemonic = "cmpexch"; break; @@ -749,35 +752,35 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(CMPLES, 0, X1): case OE_RRR(CMPLES, 2, Y0): case OE_RRR(CMPLES, 2, Y1): - tcg_gen_setcond_tl(TCG_COND_LE, tdest, tsrca, tsrcb); + tcg_gen_setcond_tl(TCG_COND_LE, TDEST, tsrca, tsrcb); mnemonic = "cmples"; break; case OE_RRR(CMPLEU, 0, X0): case OE_RRR(CMPLEU, 0, X1): case OE_RRR(CMPLEU, 2, Y0): case OE_RRR(CMPLEU, 2, Y1): - tcg_gen_setcond_tl(TCG_COND_LEU, tdest, tsrca, tsrcb); + tcg_gen_setcond_tl(TCG_COND_LEU, TDEST, tsrca, tsrcb); mnemonic = "cmpleu"; break; case OE_RRR(CMPLTS, 0, X0): case OE_RRR(CMPLTS, 0, X1): case OE_RRR(CMPLTS, 2, Y0): case OE_RRR(CMPLTS, 2, Y1): - tcg_gen_setcond_tl(TCG_COND_LT, tdest, tsrca, tsrcb); + tcg_gen_setcond_tl(TCG_COND_LT, TDEST, tsrca, tsrcb); mnemonic = "cmplts"; break; case OE_RRR(CMPLTU, 0, X0): case OE_RRR(CMPLTU, 0, X1): case OE_RRR(CMPLTU, 2, Y0): case OE_RRR(CMPLTU, 2, Y1): - tcg_gen_setcond_tl(TCG_COND_LTU, tdest, tsrca, tsrcb); + tcg_gen_setcond_tl(TCG_COND_LTU, TDEST, tsrca, tsrcb); mnemonic = "cmpltu"; break; case OE_RRR(CMPNE, 0, X0): case OE_RRR(CMPNE, 0, X1): case OE_RRR(CMPNE, 3, Y0): case OE_RRR(CMPNE, 3, Y1): - tcg_gen_setcond_tl(TCG_COND_NE, tdest, tsrca, tsrcb); + tcg_gen_setcond_tl(TCG_COND_NE, TDEST, tsrca, tsrcb); mnemonic = "cmpne"; break; case OE_RRR(CMULAF, 0, X0): @@ -792,30 +795,30 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(DBLALIGN2, 0, X0): case OE_RRR(DBLALIGN2, 0, X1): - gen_dblaligni(tdest, tsrca, tsrcb, 16); + gen_dblaligni(TDEST, tsrca, tsrcb, 16); mnemonic = "dblalign2"; break; case OE_RRR(DBLALIGN4, 0, X0): case OE_RRR(DBLALIGN4, 0, X1): - gen_dblaligni(tdest, tsrca, tsrcb, 32); + gen_dblaligni(TDEST, tsrca, tsrcb, 32); mnemonic = "dblalign4"; break; case OE_RRR(DBLALIGN6, 0, X0): case OE_RRR(DBLALIGN6, 0, X1): - gen_dblaligni(tdest, tsrca, tsrcb, 48); + gen_dblaligni(TDEST, tsrca, tsrcb, 48); mnemonic = "dblalign6"; break; case OE_RRR(DBLALIGN, 0, X0): - gen_dblalign(tdest, load_gr(dc, dest), tsrca, tsrcb); + gen_dblalign(TDEST, load_gr(dc, dest), tsrca, tsrcb); mnemonic = "dblalign"; break; case OE_RRR(EXCH4, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_EXCH4); mnemonic = "exch4"; break; case OE_RRR(EXCH, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_EXCH); mnemonic = "exch"; break; @@ -829,42 +832,42 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(FDOUBLE_UNPACK_MIN, 0, X0): return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(FETCHADD4, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHADD4); mnemonic = "fetchadd4"; break; case OE_RRR(FETCHADDGEZ4, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHADDGEZ4); mnemonic = "fetchaddgez4"; break; case OE_RRR(FETCHADDGEZ, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHADDGEZ); mnemonic = "fetchaddgez"; break; case OE_RRR(FETCHADD, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHADD); mnemonic = "fetchadd"; break; case OE_RRR(FETCHAND4, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHAND4); mnemonic = "fetchand4"; break; case OE_RRR(FETCHAND, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHAND); mnemonic = "fetchand"; break; case OE_RRR(FETCHOR4, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHOR4); mnemonic = "fetchor4"; break; case OE_RRR(FETCHOR, 0, X1): - gen_atomic_excp(dc, dest, tdest, tsrca, tsrcb, + gen_atomic_excp(dc, dest, TDEST, tsrca, tsrcb, TILEGX_EXCP_OPCODE_FETCHOR); mnemonic = "fetchor"; break; @@ -880,11 +883,12 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(MNZ, 4, Y0): case OE_RRR(MNZ, 4, Y1): t0 = load_zero(dc); - tcg_gen_movcond_tl(TCG_COND_NE, tdest, tsrca, t0, tsrcb, t0); + tcg_gen_movcond_tl(TCG_COND_NE, TDEST, tsrca, t0, tsrcb, t0); mnemonic = "mnz"; break; case OE_RRR(MULAX, 0, X0): case OE_RRR(MULAX, 3, Y0): + tdest = dest_gr(dc, dest); tcg_gen_mul_tl(tdest, tsrca, tsrcb); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); tcg_gen_ext32s_tl(tdest, tdest); @@ -892,106 +896,117 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, break; case OE_RRR(MULA_HS_HS, 0, X0): case OE_RRR(MULA_HS_HS, 9, Y0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HS, HS); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hs_hs"; break; case OE_RRR(MULA_HS_HU, 0, X0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HS, HU); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hs_hu"; break; case OE_RRR(MULA_HS_LS, 0, X0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HS, LS); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hs_ls"; break; case OE_RRR(MULA_HS_LU, 0, X0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HS, LU); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hs_lu"; break; case OE_RRR(MULA_HU_HU, 0, X0): case OE_RRR(MULA_HU_HU, 9, Y0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HU, HU); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hu_hu"; break; case OE_RRR(MULA_HU_LS, 0, X0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HU, LS); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hu_ls"; break; case OE_RRR(MULA_HU_LU, 0, X0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, HU, LU); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_hu_lu"; break; case OE_RRR(MULA_LS_LS, 0, X0): case OE_RRR(MULA_LS_LS, 9, Y0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, LS, LS); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_ls_ls"; break; case OE_RRR(MULA_LS_LU, 0, X0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, LS, LU); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_ls_lu"; break; case OE_RRR(MULA_LU_LU, 0, X0): case OE_RRR(MULA_LU_LU, 9, Y0): + tdest = dest_gr(dc, dest); gen_mul_half(tdest, tsrca, tsrcb, LU, LU); tcg_gen_add_tl(tdest, tdest, load_gr(dc, dest)); mnemonic = "mula_lu_lu"; break; case OE_RRR(MULX, 0, X0): case OE_RRR(MULX, 3, Y0): + tdest = dest_gr(dc, dest); tcg_gen_mul_tl(tdest, tsrca, tsrcb); tcg_gen_ext32s_tl(tdest, tdest); mnemonic = "mulx"; break; case OE_RRR(MUL_HS_HS, 0, X0): case OE_RRR(MUL_HS_HS, 8, Y0): - gen_mul_half(tdest, tsrca, tsrcb, HS, HS); + gen_mul_half(TDEST, tsrca, tsrcb, HS, HS); mnemonic = "mul_hs_hs"; break; case OE_RRR(MUL_HS_HU, 0, X0): - gen_mul_half(tdest, tsrca, tsrcb, HS, HU); + gen_mul_half(TDEST, tsrca, tsrcb, HS, HU); mnemonic = "mul_hs_hu"; break; case OE_RRR(MUL_HS_LS, 0, X0): - gen_mul_half(tdest, tsrca, tsrcb, HS, LS); + gen_mul_half(TDEST, tsrca, tsrcb, HS, LS); mnemonic = "mul_hs_ls"; break; case OE_RRR(MUL_HS_LU, 0, X0): - gen_mul_half(tdest, tsrca, tsrcb, HS, LU); + gen_mul_half(TDEST, tsrca, tsrcb, HS, LU); mnemonic = "mul_hs_lu"; break; case OE_RRR(MUL_HU_HU, 0, X0): case OE_RRR(MUL_HU_HU, 8, Y0): - gen_mul_half(tdest, tsrca, tsrcb, HU, HU); + gen_mul_half(TDEST, tsrca, tsrcb, HU, HU); mnemonic = "mul_hu_hu"; break; case OE_RRR(MUL_HU_LS, 0, X0): - gen_mul_half(tdest, tsrca, tsrcb, HU, LS); + gen_mul_half(TDEST, tsrca, tsrcb, HU, LS); mnemonic = "mul_hu_ls"; break; case OE_RRR(MUL_HU_LU, 0, X0): - gen_mul_half(tdest, tsrca, tsrcb, HU, LU); + gen_mul_half(TDEST, tsrca, tsrcb, HU, LU); mnemonic = "mul_hu_lu"; break; case OE_RRR(MUL_LS_LS, 0, X0): case OE_RRR(MUL_LS_LS, 8, Y0): - gen_mul_half(tdest, tsrca, tsrcb, LS, LS); + gen_mul_half(TDEST, tsrca, tsrcb, LS, LS); mnemonic = "mul_ls_ls"; break; case OE_RRR(MUL_LS_LU, 0, X0): - gen_mul_half(tdest, tsrca, tsrcb, LS, LU); + gen_mul_half(TDEST, tsrca, tsrcb, LS, LU); mnemonic = "mul_ls_lu"; break; case OE_RRR(MUL_LU_LU, 0, X0): case OE_RRR(MUL_LU_LU, 8, Y0): - gen_mul_half(tdest, tsrca, tsrcb, LU, LU); + gen_mul_half(TDEST, tsrca, tsrcb, LU, LU); mnemonic = "mul_lu_lu"; break; case OE_RRR(MZ, 0, X0): @@ -999,27 +1014,28 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(MZ, 4, Y0): case OE_RRR(MZ, 4, Y1): t0 = load_zero(dc); - tcg_gen_movcond_tl(TCG_COND_EQ, tdest, tsrca, t0, tsrcb, t0); + tcg_gen_movcond_tl(TCG_COND_EQ, TDEST, tsrca, t0, tsrcb, t0); mnemonic = "mz"; break; case OE_RRR(NOR, 0, X0): case OE_RRR(NOR, 0, X1): case OE_RRR(NOR, 5, Y0): case OE_RRR(NOR, 5, Y1): - tcg_gen_nor_tl(tdest, tsrca, tsrcb); + tcg_gen_nor_tl(TDEST, tsrca, tsrcb); mnemonic = "nor"; break; case OE_RRR(OR, 0, X0): case OE_RRR(OR, 0, X1): case OE_RRR(OR, 5, Y0): case OE_RRR(OR, 5, Y1): - tcg_gen_or_tl(tdest, tsrca, tsrcb); + tcg_gen_or_tl(TDEST, tsrca, tsrcb); mnemonic = "or"; break; case OE_RRR(ROTL, 0, X0): case OE_RRR(ROTL, 0, X1): case OE_RRR(ROTL, 6, Y0): case OE_RRR(ROTL, 6, Y1): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrcb, 63); tcg_gen_rotl_tl(tdest, tsrca, tdest); mnemonic = "rotl"; @@ -1028,6 +1044,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL1ADDX, 0, X1): case OE_RRR(SHL1ADDX, 7, Y0): case OE_RRR(SHL1ADDX, 7, Y1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 1); tcg_gen_add_tl(tdest, tdest, tsrcb); tcg_gen_ext32s_tl(tdest, tdest); @@ -1037,6 +1054,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL1ADD, 0, X1): case OE_RRR(SHL1ADD, 1, Y0): case OE_RRR(SHL1ADD, 1, Y1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 1); tcg_gen_add_tl(tdest, tdest, tsrcb); mnemonic = "shl1add"; @@ -1045,6 +1063,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL2ADDX, 0, X1): case OE_RRR(SHL2ADDX, 7, Y0): case OE_RRR(SHL2ADDX, 7, Y1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 2); tcg_gen_add_tl(tdest, tdest, tsrcb); tcg_gen_ext32s_tl(tdest, tdest); @@ -1054,6 +1073,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL2ADD, 0, X1): case OE_RRR(SHL2ADD, 1, Y0): case OE_RRR(SHL2ADD, 1, Y1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 2); tcg_gen_add_tl(tdest, tdest, tsrcb); mnemonic = "shl2add"; @@ -1062,6 +1082,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL3ADDX, 0, X1): case OE_RRR(SHL3ADDX, 7, Y0): case OE_RRR(SHL3ADDX, 7, Y1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 3); tcg_gen_add_tl(tdest, tdest, tsrcb); tcg_gen_ext32s_tl(tdest, tdest); @@ -1071,12 +1092,14 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL3ADD, 0, X1): case OE_RRR(SHL3ADD, 1, Y0): case OE_RRR(SHL3ADD, 1, Y1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 3); tcg_gen_add_tl(tdest, tdest, tsrcb); mnemonic = "shl3add"; break; case OE_RRR(SHLX, 0, X0): case OE_RRR(SHLX, 0, X1): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrcb, 31); tcg_gen_shl_tl(tdest, tsrca, tdest); tcg_gen_ext32s_tl(tdest, tdest); @@ -1086,6 +1109,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHL, 0, X1): case OE_RRR(SHL, 6, Y0): case OE_RRR(SHL, 6, Y1): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrcb, 63); tcg_gen_shl_tl(tdest, tsrca, tdest); mnemonic = "shl"; @@ -1094,12 +1118,14 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHRS, 0, X1): case OE_RRR(SHRS, 6, Y0): case OE_RRR(SHRS, 6, Y1): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrcb, 63); tcg_gen_sar_tl(tdest, tsrca, tdest); mnemonic = "shrs"; break; case OE_RRR(SHRUX, 0, X0): case OE_RRR(SHRUX, 0, X1): + tdest = dest_gr(dc, dest); t0 = tcg_temp_new(); tcg_gen_andi_tl(t0, tsrcb, 31); tcg_gen_ext32u_tl(tdest, tsrca); @@ -1112,23 +1138,25 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SHRU, 0, X1): case OE_RRR(SHRU, 6, Y0): case OE_RRR(SHRU, 6, Y1): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrcb, 63); tcg_gen_shr_tl(tdest, tsrca, tdest); mnemonic = "shru"; break; case OE_RRR(SHUFFLEBYTES, 0, X0): - gen_helper_shufflebytes(tdest, load_gr(dc, dest), tsrca, tsrca); + gen_helper_shufflebytes(TDEST, load_gr(dc, dest), tsrca, tsrca); mnemonic = "shufflebytes"; break; case OE_RRR(SUBXSC, 0, X0): case OE_RRR(SUBXSC, 0, X1): - gen_saturate_op(tdest, tsrca, tsrcb, tcg_gen_sub_tl); + gen_saturate_op(TDEST, tsrca, tsrcb, tcg_gen_sub_tl); mnemonic = "subxsc"; break; case OE_RRR(SUBX, 0, X0): case OE_RRR(SUBX, 0, X1): case OE_RRR(SUBX, 0, Y0): case OE_RRR(SUBX, 0, Y1): + tdest = dest_gr(dc, dest); tcg_gen_sub_tl(tdest, tsrca, tsrcb); tcg_gen_ext32s_tl(tdest, tdest); mnemonic = "subx"; @@ -1137,7 +1165,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(SUB, 0, X1): case OE_RRR(SUB, 0, Y0): case OE_RRR(SUB, 0, Y1): - tcg_gen_sub_tl(tdest, tsrca, tsrcb); + tcg_gen_sub_tl(TDEST, tsrca, tsrcb); mnemonic = "sub"; break; case OE_RRR(V1ADDUC, 0, X0): @@ -1145,7 +1173,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1ADD, 0, X0): case OE_RRR(V1ADD, 0, X1): - gen_helper_v1add(tdest, tsrca, tsrcb); + gen_helper_v1add(TDEST, tsrca, tsrcb); mnemonic = "v1add"; break; case OE_RRR(V1ADIFFU, 0, X0): @@ -1153,6 +1181,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1CMPEQ, 0, X0): case OE_RRR(V1CMPEQ, 0, X1): + tdest = dest_gr(dc, dest); tcg_gen_xor_tl(tdest, tsrca, tsrcb); gen_v1cmpeq0(tdest); mnemonic = "v1cmpeq"; @@ -1168,6 +1197,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1CMPNE, 0, X0): case OE_RRR(V1CMPNE, 0, X1): + tdest = dest_gr(dc, dest); tcg_gen_xor_tl(tdest, tsrca, tsrcb); gen_v1cmpne0(tdest); mnemonic = "v1cmpne"; @@ -1194,7 +1224,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, case OE_RRR(V1MNZ, 0, X1): return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1MULTU, 0, X0): - gen_helper_v1multu(tdest, tsrca, tsrcb); + gen_helper_v1multu(TDEST, tsrca, tsrcb); mnemonic = "v1multu"; break; case OE_RRR(V1MULUS, 0, X0): @@ -1206,17 +1236,17 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1SHL, 0, X0): case OE_RRR(V1SHL, 0, X1): - gen_helper_v1shl(tdest, tsrca, tsrcb); + gen_helper_v1shl(TDEST, tsrca, tsrcb); mnemonic = "v1shl"; break; case OE_RRR(V1SHRS, 0, X0): case OE_RRR(V1SHRS, 0, X1): - gen_helper_v1shrs(tdest, tsrca, tsrcb); + gen_helper_v1shrs(TDEST, tsrca, tsrcb); mnemonic = "v1shrs"; break; case OE_RRR(V1SHRU, 0, X0): case OE_RRR(V1SHRU, 0, X1): - gen_helper_v1shru(tdest, tsrca, tsrcb); + gen_helper_v1shru(TDEST, tsrca, tsrcb); mnemonic = "v1shru"; break; case OE_RRR(V1SUBUC, 0, X0): @@ -1224,7 +1254,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V1SUB, 0, X0): case OE_RRR(V1SUB, 0, X1): - gen_helper_v1sub(tdest, tsrca, tsrcb); + gen_helper_v1sub(TDEST, tsrca, tsrcb); mnemonic = "v1sub"; break; case OE_RRR(V2ADDSC, 0, X0): @@ -1232,7 +1262,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V2ADD, 0, X0): case OE_RRR(V2ADD, 0, X1): - gen_helper_v2add(tdest, tsrca, tsrcb); + gen_helper_v2add(TDEST, tsrca, tsrcb); mnemonic = "v2add"; break; case OE_RRR(V2ADIFFS, 0, X0): @@ -1281,17 +1311,17 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V2SHL, 0, X0): case OE_RRR(V2SHL, 0, X1): - gen_helper_v2shl(tdest, tsrca, tsrcb); + gen_helper_v2shl(TDEST, tsrca, tsrcb); mnemonic = "v2shl"; break; case OE_RRR(V2SHRS, 0, X0): case OE_RRR(V2SHRS, 0, X1): - gen_helper_v2shrs(tdest, tsrca, tsrcb); + gen_helper_v2shrs(TDEST, tsrca, tsrcb); mnemonic = "v2shrs"; break; case OE_RRR(V2SHRU, 0, X0): case OE_RRR(V2SHRU, 0, X1): - gen_helper_v2shru(tdest, tsrca, tsrcb); + gen_helper_v2shru(TDEST, tsrca, tsrcb); mnemonic = "v2shru"; break; case OE_RRR(V2SUBSC, 0, X0): @@ -1299,7 +1329,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V2SUB, 0, X0): case OE_RRR(V2SUB, 0, X1): - gen_helper_v2sub(tdest, tsrca, tsrcb); + gen_helper_v2sub(TDEST, tsrca, tsrcb); mnemonic = "v2sub"; break; case OE_RRR(V4ADDSC, 0, X0): @@ -1307,18 +1337,19 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V4ADD, 0, X0): case OE_RRR(V4ADD, 0, X1): - gen_v4op(tdest, tsrca, tsrcb, tcg_gen_add_i32); + gen_v4op(TDEST, tsrca, tsrcb, tcg_gen_add_i32); mnemonic = "v4add"; break; case OE_RRR(V4INT_H, 0, X0): case OE_RRR(V4INT_H, 0, X1): + tdest = dest_gr(dc, dest); tcg_gen_shri_tl(tdest, tsrcb, 32); tcg_gen_deposit_tl(tdest, tsrca, tdest, 0, 32); mnemonic = "v4int_h"; break; case OE_RRR(V4INT_L, 0, X0): case OE_RRR(V4INT_L, 0, X1): - tcg_gen_deposit_tl(tdest, tsrcb, tsrca, 32, 32); + tcg_gen_deposit_tl(TDEST, tsrcb, tsrca, 32, 32); mnemonic = "v4int_l"; break; case OE_RRR(V4PACKSC, 0, X0): @@ -1328,17 +1359,17 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V4SHL, 0, X0): case OE_RRR(V4SHL, 0, X1): - gen_v4sh(tdest, tsrca, tsrcb, tcg_gen_shl_i32); + gen_v4sh(TDEST, tsrca, tsrcb, tcg_gen_shl_i32); mnemonic = "v4shl"; break; case OE_RRR(V4SHRS, 0, X0): case OE_RRR(V4SHRS, 0, X1): - gen_v4sh(tdest, tsrca, tsrcb, tcg_gen_sar_i32); + gen_v4sh(TDEST, tsrca, tsrcb, tcg_gen_sar_i32); mnemonic = "v4shrs"; break; case OE_RRR(V4SHRU, 0, X0): case OE_RRR(V4SHRU, 0, X1): - gen_v4sh(tdest, tsrca, tsrcb, tcg_gen_shr_i32); + gen_v4sh(TDEST, tsrca, tsrcb, tcg_gen_shr_i32); mnemonic = "v4shru"; break; case OE_RRR(V4SUBSC, 0, X0): @@ -1346,14 +1377,14 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_RRR(V4SUB, 0, X0): case OE_RRR(V4SUB, 0, X1): - gen_v4op(tdest, tsrca, tsrcb, tcg_gen_sub_i32); + gen_v4op(TDEST, tsrca, tsrcb, tcg_gen_sub_i32); mnemonic = "v2sub"; break; case OE_RRR(XOR, 0, X0): case OE_RRR(XOR, 0, X1): case OE_RRR(XOR, 5, Y0): case OE_RRR(XOR, 5, Y1): - tcg_gen_xor_tl(tdest, tsrca, tsrcb); + tcg_gen_xor_tl(TDEST, tsrca, tsrcb); mnemonic = "xor"; break; default: @@ -1368,7 +1399,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned opext, static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, unsigned dest, unsigned srca, int imm) { - TCGv tdest = dest_gr(dc, dest); + TCGv tdest; TCGv tsrca = load_gr(dc, srca); bool prefetch_nofault = false; const char *mnemonic; @@ -1381,13 +1412,14 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, case OE(ADDI_OPCODE_Y1, 0, Y1): case OE_IM(ADDI, X0): case OE_IM(ADDI, X1): - tcg_gen_addi_tl(tdest, tsrca, imm); + tcg_gen_addi_tl(TDEST, tsrca, imm); mnemonic = "addi"; break; case OE(ADDXI_OPCODE_Y0, 0, Y0): case OE(ADDXI_OPCODE_Y1, 0, Y1): case OE_IM(ADDXI, X0): case OE_IM(ADDXI, X1): + tdest = dest_gr(dc, dest); tcg_gen_addi_tl(tdest, tsrca, imm); tcg_gen_ext32s_tl(tdest, tdest); mnemonic = "addxi"; @@ -1396,26 +1428,26 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, case OE(ANDI_OPCODE_Y1, 0, Y1): case OE_IM(ANDI, X0): case OE_IM(ANDI, X1): - tcg_gen_andi_tl(tdest, tsrca, imm); + tcg_gen_andi_tl(TDEST, tsrca, imm); mnemonic = "andi"; break; case OE(CMPEQI_OPCODE_Y0, 0, Y0): case OE(CMPEQI_OPCODE_Y1, 0, Y1): case OE_IM(CMPEQI, X0): case OE_IM(CMPEQI, X1): - tcg_gen_setcondi_tl(TCG_COND_EQ, tdest, tsrca, imm); + tcg_gen_setcondi_tl(TCG_COND_EQ, TDEST, tsrca, imm); mnemonic = "cmpeqi"; break; case OE(CMPLTSI_OPCODE_Y0, 0, Y0): case OE(CMPLTSI_OPCODE_Y1, 0, Y1): case OE_IM(CMPLTSI, X0): case OE_IM(CMPLTSI, X1): - tcg_gen_setcondi_tl(TCG_COND_LT, tdest, tsrca, imm); + tcg_gen_setcondi_tl(TCG_COND_LT, TDEST, tsrca, imm); mnemonic = "cmpltsi"; break; case OE_IM(CMPLTUI, X0): case OE_IM(CMPLTUI, X1): - tcg_gen_setcondi_tl(TCG_COND_LTU, tdest, tsrca, imm); + tcg_gen_setcondi_tl(TCG_COND_LTU, TDEST, tsrca, imm); mnemonic = "cmpltui"; break; case OE_IM(LD1S_ADD, X1): @@ -1478,11 +1510,12 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, mnemonic = "ld_add"; do_load_add: if (!prefetch_nofault) { - tcg_gen_qemu_ld_tl(tdest, tsrca, dc->mmuidx, memop); + tcg_gen_qemu_ld_tl(TDEST, tsrca, dc->mmuidx, memop); } tcg_gen_addi_tl(dest_gr(dc, srca), tsrca, imm); break; case OE_IM(LDNA_ADD, X1): + tdest = dest_gr(dc, dest); tcg_gen_andi_tl(tdest, tsrca, ~7); tcg_gen_qemu_ld_tl(tdest, tdest, dc->mmuidx, MO_TEQ); tcg_gen_addi_tl(dest_gr(dc, srca), tsrca, imm); @@ -1490,18 +1523,19 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, break; case OE_IM(ORI, X0): case OE_IM(ORI, X1): - tcg_gen_ori_tl(tdest, tsrca, imm); + tcg_gen_ori_tl(TDEST, tsrca, imm); mnemonic = "ori"; break; case OE_IM(V1ADDI, X0): case OE_IM(V1ADDI, X1): t0 = tcg_const_tl(V1_IMM(imm)); - gen_helper_v1add(tdest, tsrca, t0); + gen_helper_v1add(TDEST, tsrca, t0); tcg_temp_free(t0); mnemonic = "v1addi"; break; case OE_IM(V1CMPEQI, X0): case OE_IM(V1CMPEQI, X1): + tdest = dest_gr(dc, dest); tcg_gen_xori_tl(tdest, tsrca, V1_IMM(imm)); gen_v1cmpeq0(tdest); mnemonic = "v1cmpeqi"; @@ -1529,7 +1563,7 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_IM(XORI, X0): case OE_IM(XORI, X1): - tcg_gen_xori_tl(tdest, tsrca, imm); + tcg_gen_xori_tl(TDEST, tsrca, imm); mnemonic = "xori"; break; @@ -1537,18 +1571,19 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, case OE_SH(ROTLI, X1): case OE_SH(ROTLI, Y0): case OE_SH(ROTLI, Y1): - tcg_gen_rotli_tl(tdest, tsrca, imm); + tcg_gen_rotli_tl(TDEST, tsrca, imm); mnemonic = "rotli"; break; case OE_SH(SHLI, X0): case OE_SH(SHLI, X1): case OE_SH(SHLI, Y0): case OE_SH(SHLI, Y1): - tcg_gen_shli_tl(tdest, tsrca, imm); + tcg_gen_shli_tl(TDEST, tsrca, imm); mnemonic = "shli"; break; case OE_SH(SHLXI, X0): case OE_SH(SHLXI, X1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, imm & 31); tcg_gen_ext32s_tl(tdest, tdest); mnemonic = "shlxi"; @@ -1557,18 +1592,19 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, case OE_SH(SHRSI, X1): case OE_SH(SHRSI, Y0): case OE_SH(SHRSI, Y1): - tcg_gen_sari_tl(tdest, tsrca, imm); + tcg_gen_sari_tl(TDEST, tsrca, imm); mnemonic = "shrsi"; break; case OE_SH(SHRUI, X0): case OE_SH(SHRUI, X1): case OE_SH(SHRUI, Y0): case OE_SH(SHRUI, Y1): - tcg_gen_shri_tl(tdest, tsrca, imm); + tcg_gen_shri_tl(TDEST, tsrca, imm); mnemonic = "shrui"; break; case OE_SH(SHRUXI, X0): case OE_SH(SHRUXI, X1): + tdest = dest_gr(dc, dest); if ((imm & 31) == 0) { tcg_gen_ext32s_tl(tdest, tsrca); } else { @@ -1579,6 +1615,7 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, break; case OE_SH(V1SHLI, X0): case OE_SH(V1SHLI, X1): + tdest = dest_gr(dc, dest); i2 = imm & 7; i3 = 0xff >> i2; tcg_gen_andi_tl(tdest, tsrca, V1_IMM(i3)); @@ -1588,12 +1625,13 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, case OE_SH(V1SHRSI, X0): case OE_SH(V1SHRSI, X1): t0 = tcg_const_tl(imm & 7); - gen_helper_v1shrs(tdest, tsrca, t0); + gen_helper_v1shrs(TDEST, tsrca, t0); tcg_temp_free(t0); mnemonic = "v1shrsi"; break; case OE_SH(V1SHRUI, X0): case OE_SH(V1SHRUI, X1): + tdest = dest_gr(dc, dest); i2 = imm & 7; i3 = (0xff << i2) & 0xff; tcg_gen_andi_tl(tdest, tsrca, V1_IMM(i3)); @@ -1610,17 +1648,19 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, case OE(ADDLI_OPCODE_X0, 0, X0): case OE(ADDLI_OPCODE_X1, 0, X1): - tcg_gen_addi_tl(tdest, tsrca, imm); + tcg_gen_addi_tl(TDEST, tsrca, imm); mnemonic = "addli"; break; case OE(ADDXLI_OPCODE_X0, 0, X0): case OE(ADDXLI_OPCODE_X1, 0, X1): + tdest = dest_gr(dc, dest); tcg_gen_addi_tl(tdest, tsrca, imm); tcg_gen_ext32s_tl(tdest, tdest); mnemonic = "addxli"; break; case OE(SHL16INSLI_OPCODE_X0, 0, X0): case OE(SHL16INSLI_OPCODE_X1, 0, X1): + tdest = dest_gr(dc, dest); tcg_gen_shli_tl(tdest, tsrca, 16); tcg_gen_ori_tl(tdest, tdest, imm & 0xffff); mnemonic = "shl16insli";