From patchwork Sun Sep 27 00:10:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Gang X-Patchwork-Id: 523123 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 18B4D140771 for ; Sun, 27 Sep 2015 10:11:11 +1000 (AEST) Received: from localhost ([::1]:55658 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZfzYb-0000dA-4R for incoming@patchwork.ozlabs.org; Sat, 26 Sep 2015 20:11:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZfzYJ-0000M3-5F for qemu-devel@nongnu.org; Sat, 26 Sep 2015 20:10:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZfzYF-0003cj-SR for qemu-devel@nongnu.org; Sat, 26 Sep 2015 20:10:51 -0400 Received: from smtpbg299.qq.com ([184.105.67.99]:39422) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZfzYF-0003R9-Hl for qemu-devel@nongnu.org; Sat, 26 Sep 2015 20:10:47 -0400 X-QQ-mid: esmtp20t1443312621t365t25651 Received: from localhost.localdomain (unknown [223.72.67.80]) by esmtp4.qq.com (ESMTP) with id ; Sun, 27 Sep 2015 08:10:20 +0800 (CST) X-QQ-SSF: 01000000000000F0FH600F00002000H X-QQ-FEAT: aNIQy3Sfu63W6JMiwFIKn2Do0wL2IEr2KtJhKWH+X7udgsFW7uTbxJ7tdQ3oN ed3SuUpPA4SZJtiUwjcX+96iK9YYvajEjK1t7H2HZ8KsSOSAQ6cdh/xO34SXvP7GUdRdfs3 ZQEslOk54uOFiTij5VBTy7U5MnM+A9Uj2jOcqFdioFw82pEsDhpFfviXq+Z4xBeVj2zUWbC jqVBPcF3j3nIEUqR/nqKxC78FWhQmPqEPjuuY1nNNu4g68qGlxa54 X-QQ-GoodBg: 0 X-QQ-CSender: gang.chen.5i5j@qq.com From: gang.chen.5i5j@gmail.com To: riku.voipio@iki.fi, peter.maydell@linaro.org, rth@twiddle.net Date: Sun, 27 Sep 2015 08:10:18 +0800 Message-Id: <1443312618-13641-1-git-send-email-gang.chen.5i5j@gmail.com> X-Mailer: git-send-email 1.9.3 X-QQ-SENDSIZE: 520 X-QQ-FName: 7D4068BB404549A69A8CBB249C8F091D X-QQ-LocalIP: 112.95.241.173 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x X-Received-From: 184.105.67.99 Cc: cmetcalf@ezchip.com, qemu-devel@nongnu.org, xili_gchen_5257@hotmail.com, Chen Gang Subject: [Qemu-devel] [PATCH] tilegx: Implement tilegx signal features X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Chen Gang After this patch, tilegx can handle raise instruction succesfully. Signed-off-by: Chen Gang --- linux-user/signal.c | 171 +++++++++++++++++++++++++++++++++++++++++++- linux-user/tilegx/syscall.h | 4 ++ target-tilegx/cpu.h | 3 +- 3 files changed, 176 insertions(+), 2 deletions(-) diff --git a/linux-user/signal.c b/linux-user/signal.c index 502efd9..31f8fb0 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -5543,6 +5543,174 @@ long do_rt_sigreturn(CPUAlphaState *env) force_sig(TARGET_SIGSEGV); } +#elif defined(TARGET_TILEGX) + +struct target_sigcontext { + union { + /* General-purpose registers. */ + abi_ulong gregs[56]; + struct { + abi_ulong __gregs[53]; + abi_ulong tp; /* Aliases gregs[TREG_TP]. */ + abi_ulong sp; /* Aliases gregs[TREG_SP]. */ + abi_ulong lr; /* Aliases gregs[TREG_LR]. */ + }; + }; + abi_ulong pc; /* Program counter. */ + abi_ulong ics; /* In Interrupt Critical Section? */ + abi_ulong faultnum; /* Fault number. */ + abi_ulong pad[5]; +}; + +struct target_ucontext { + abi_ulong tuc_flags; + abi_ulong tuc_link; + target_stack_t tuc_stack; + struct target_sigcontext tuc_mcontext; + target_sigset_t tuc_sigmask; /* mask last for extensibility */ +}; + +struct target_rt_sigframe { + unsigned char save_area[16]; /* caller save area */ + struct target_siginfo info; + struct target_ucontext uc; +}; + +static void setup_sigcontext(struct target_sigcontext *sc, + CPUArchState *env, int signo) +{ + int i; + + for (i = 0; i < TILEGX_R_COUNT; ++i) { + __put_user(env->regs[i], &sc->gregs[i]); + } + + __put_user(env->pc, &sc->pc); + __put_user(0, &sc->ics); + __put_user(signo, &sc->faultnum); + env->spregs[TILEGX_SPR_EX_CONTEXT_1] = 1 << SPR_EX_CONTEXT_1_1__ICS_SHIFT; +} + +static uint64_t restore_spreg_ex1(uint64_t ex1) +{ + return ((ex1 >> SPR_EX_CONTEXT_1_1__ICS_SHIFT) + & SPR_EX_CONTEXT_1_1__ICS_RMASK) + << SPR_EX_CONTEXT_1_1__ICS_SHIFT; +} + +static void restore_sigcontext(CPUTLGState *env, struct target_sigcontext *sc) +{ + int i; + + for (i = 0; i < TILEGX_R_COUNT; ++i) { + __get_user(env->regs[i], &sc->gregs[i]); + } + + __get_user(env->pc, &sc->pc); + env->signo = TARGET_INT_SWINT_1_SIGRETURN; + env->spregs[TILEGX_SPR_EX_CONTEXT_1] = + restore_spreg_ex1(env->spregs[TILEGX_SPR_EX_CONTEXT_1]); +} + +static abi_ulong get_sigframe(struct target_sigaction *ka, CPUArchState *env, + size_t frame_size) +{ + unsigned long sp = env->regs[TILEGX_R_SP]; + + if (on_sig_stack(sp) && !likely(on_sig_stack(sp - frame_size))) { + return -1UL; + } + + if ((ka->sa_flags & SA_ONSTACK) && !sas_ss_flags(sp)) { + sp = target_sigaltstack_used.ss_sp + target_sigaltstack_used.ss_size; + } + + sp -= frame_size; + sp &= -16UL; + return sp; +} + +static void setup_rt_frame(int sig, struct target_sigaction *ka, + target_siginfo_t *info, + target_sigset_t *set, CPUArchState *env) +{ + abi_ulong frame_addr; + struct target_rt_sigframe *frame; + unsigned long restorer; + + frame_addr = get_sigframe(ka, env, sizeof(*frame)); + if (!lock_user_struct(VERIFY_WRITE, frame, frame_addr, 0)) { + goto give_sigsegv; + } + + /* Always write at least the signal number for the stack backtracer. */ + if (ka->sa_flags & TARGET_SA_SIGINFO) { + /* At sigreturn time, restore the callee-save registers too. */ + tswap_siginfo(&frame->info, info); + /* regs->flags |= PT_FLAGS_RESTORE_REGS; FIXME: we can skip it? */ + } else { + __put_user(info->si_signo, &frame->info.si_signo); + } + + /* Create the ucontext. */ + __put_user(0, &frame->uc.tuc_flags); + __put_user(0, &frame->uc.tuc_link); + __put_user(target_sigaltstack_used.ss_sp, &frame->uc.tuc_stack.ss_sp); + __put_user(sas_ss_flags(env->regs[TILEGX_R_SP]), + &frame->uc.tuc_stack.ss_flags); + __put_user(target_sigaltstack_used.ss_size, &frame->uc.tuc_stack.ss_size); + setup_sigcontext(&frame->uc.tuc_mcontext, env, info->si_signo); + + restorer = (unsigned long) do_rt_sigreturn; + if (ka->sa_flags & TARGET_SA_RESTORER) { + restorer = (unsigned long) ka->sa_restorer; + } + env->pc = (unsigned long) ka->_sa_handler; + env->regs[TILEGX_R_SP] = (unsigned long) frame; + env->regs[TILEGX_R_LR] = restorer; + env->regs[0] = (unsigned long) sig; + env->regs[1] = (unsigned long) &frame->info; + env->regs[2] = (unsigned long) &frame->uc; + /* regs->flags |= PT_FLAGS_CALLER_SAVES; FIXME: we can skip it? */ + + unlock_user_struct(frame, frame_addr, 1); + return; + +give_sigsegv: + if (sig == TARGET_SIGSEGV) { + ka->_sa_handler = TARGET_SIG_DFL; + } + force_sig(TARGET_SIGSEGV /* , current */); +} + +long do_rt_sigreturn(CPUTLGState *env) +{ + abi_ulong frame_addr = env->regs[TILEGX_R_SP]; + struct target_rt_sigframe *frame; + sigset_t set; + + if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1)) { + goto badframe; + } + target_to_host_sigset(&set, &frame->uc.tuc_sigmask); + do_sigprocmask(SIG_SETMASK, &set, NULL); + + restore_sigcontext(env, &frame->uc.tuc_mcontext); + if (do_sigaltstack(frame_addr + offsetof(struct target_rt_sigframe, + uc.tuc_stack), + 0, env->regs[TILEGX_R_SP]) == -EFAULT) { + goto badframe; + } + + unlock_user_struct(frame, frame_addr, 0); + return env->regs[TILEGX_R_RE]; + + + badframe: + unlock_user_struct(frame, frame_addr, 0); + force_sig(TARGET_SIGSEGV); +} + #else static void setup_frame(int sig, struct target_sigaction *ka, @@ -5662,7 +5830,8 @@ void process_pending_signals(CPUArchState *cpu_env) } #endif /* prepare the stack frame of the virtual CPU */ -#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) +#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) \ + || defined(TARGET_TILEGX) /* These targets do not have traditional signals. */ setup_rt_frame(sig, sa, &q->info, &target_old_set, cpu_env); #else diff --git a/linux-user/tilegx/syscall.h b/linux-user/tilegx/syscall.h index 653ece1..aaf3f92 100644 --- a/linux-user/tilegx/syscall.h +++ b/linux-user/tilegx/syscall.h @@ -37,4 +37,8 @@ struct target_pt_regs { #define TARGET_MLOCKALL_MCL_CURRENT 1 #define TARGET_MLOCKALL_MCL_FUTURE 2 +/* For faultnum */ +#define TARGET_INT_SWINT_1 14 +#define TARGET_INT_SWINT_1_SIGRETURN (~0) + #endif diff --git a/target-tilegx/cpu.h b/target-tilegx/cpu.h index 72a1878..4b05cd2 100644 --- a/target-tilegx/cpu.h +++ b/target-tilegx/cpu.h @@ -27,7 +27,7 @@ #define CPUArchState struct CPUTLGState #include "exec/cpu-defs.h" - +#include "spr_def_64.h" /* TILE-Gx common register alias */ #define TILEGX_R_RE 0 /* 0 register, for function/syscall return value */ @@ -53,6 +53,7 @@ enum { TILEGX_SPR_CMPEXCH = 0, TILEGX_SPR_CRITICAL_SEC = 1, TILEGX_SPR_SIM_CONTROL = 2, + TILEGX_SPR_EX_CONTEXT_1 = 3, TILEGX_SPR_COUNT };