From patchwork Sun Sep 20 20:53:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 520055 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D782114027C for ; Mon, 21 Sep 2015 07:16:47 +1000 (AEST) Received: from localhost ([::1]:53664 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZdleK-0006My-7G for incoming@patchwork.ozlabs.org; Sun, 20 Sep 2015 16:55:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38849) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zdlbx-0004iy-MP for qemu-devel@nongnu.org; Sun, 20 Sep 2015 16:53:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zdlbs-0008Tn-Ft for qemu-devel@nongnu.org; Sun, 20 Sep 2015 16:53:25 -0400 Received: from mx2.suse.de ([195.135.220.15]:37798) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zdlbs-0008TH-81; Sun, 20 Sep 2015 16:53:20 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id 28C8AADDC; Sun, 20 Sep 2015 20:53:19 +0000 (UTC) From: Alexander Graf To: qemu-ppc@nongnu.org Date: Sun, 20 Sep 2015 22:53:14 +0200 Message-Id: <1442782398-41762-4-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1442782398-41762-1-git-send-email-agraf@suse.de> References: <1442782398-41762-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 195.135.220.15 Cc: Peter Maydell , Rudolf Marek , qemu-devel@nongnu.org, Rudolf Marek Subject: [Qemu-devel] [PULL 3/7] PPC: e500 pci host: Fix ATMUs register reads X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Rudolf Marek There is a bug in the register mask when reading the ATMUs registers. As the result some registers cannot be read, and read is aliased to the other registers. Fix it. Signed-off-by: Rudolf Marek Signed-off-by: Alexander Graf --- hw/pci-host/ppce500.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 613ba73..50add34 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -140,7 +140,7 @@ static uint64_t pci_reg_read4(void *opaque, hwaddr addr, case PPCE500_PCI_OW3: case PPCE500_PCI_OW4: idx = (addr >> 5) & 0x7; - switch (addr & 0xC) { + switch (addr & 0x1F) { case PCI_POTAR: value = pci->pob[idx].potar; break; @@ -162,7 +162,7 @@ static uint64_t pci_reg_read4(void *opaque, hwaddr addr, case PPCE500_PCI_IW2: case PPCE500_PCI_IW1: idx = ((addr >> 5) & 0x3) - 1; - switch (addr & 0xC) { + switch (addr & 0x1F) { case PCI_PITAR: value = pci->pib[idx].pitar; break;