From patchwork Fri Aug 14 14:52:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xiao Guangrong X-Patchwork-Id: 507436 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 732741401E7 for ; Sat, 15 Aug 2015 01:03:22 +1000 (AEST) Received: from localhost ([::1]:46693 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQGVs-0004nX-LZ for incoming@patchwork.ozlabs.org; Fri, 14 Aug 2015 11:03:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51474) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQGRb-0005Mn-SE for qemu-devel@nongnu.org; Fri, 14 Aug 2015 10:58:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZQGRZ-0005dg-Su for qemu-devel@nongnu.org; Fri, 14 Aug 2015 10:58:55 -0400 Received: from mga02.intel.com ([134.134.136.20]:42327) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZQGRZ-0005cx-NI for qemu-devel@nongnu.org; Fri, 14 Aug 2015 10:58:53 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 14 Aug 2015 07:58:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,678,1432623600"; d="scan'208";a="748633437" Received: from xiao.sh.intel.com ([10.239.159.86]) by orsmga001.jf.intel.com with ESMTP; 14 Aug 2015 07:58:33 -0700 From: Xiao Guangrong To: pbonzini@redhat.com, imammedo@redhat.com Date: Fri, 14 Aug 2015 22:52:05 +0800 Message-Id: <1439563931-12352-13-git-send-email-guangrong.xiao@linux.intel.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1439563931-12352-1-git-send-email-guangrong.xiao@linux.intel.com> References: <1439563931-12352-1-git-send-email-guangrong.xiao@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Cc: Xiao Guangrong , ehabkost@redhat.com, kvm@vger.kernel.org, mst@redhat.com, gleb@kernel.org, mtosatti@redhat.com, qemu-devel@nongnu.org, stefanha@redhat.com, rth@twiddle.net Subject: [Qemu-devel] [PATCH v2 12/18] nvdimm: save arg3 for NVDIMM device _DSM method X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Check if the function (Arg2) has additional input info (arg3) and save the info if needed We only do the save on NVDIMM device since we are not going to support any function on root device Signed-off-by: Xiao Guangrong --- hw/mem/nvdimm/acpi.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 1 deletion(-) diff --git a/hw/mem/nvdimm/acpi.c b/hw/mem/nvdimm/acpi.c index 909a8ef..0b09efa 100644 --- a/hw/mem/nvdimm/acpi.c +++ b/hw/mem/nvdimm/acpi.c @@ -259,6 +259,26 @@ static void build_nfit_table(GSList *device_list, char *buf) } } +enum { + NFIT_CMD_IMPLEMENTED = 0, + + /* bus commands */ + NFIT_CMD_ARS_CAP = 1, + NFIT_CMD_ARS_START = 2, + NFIT_CMD_ARS_QUERY = 3, + + /* per-dimm commands */ + NFIT_CMD_SMART = 1, + NFIT_CMD_SMART_THRESHOLD = 2, + NFIT_CMD_DIMM_FLAGS = 3, + NFIT_CMD_GET_CONFIG_SIZE = 4, + NFIT_CMD_GET_CONFIG_DATA = 5, + NFIT_CMD_SET_CONFIG_DATA = 6, + NFIT_CMD_VENDOR_EFFECT_LOG_SIZE = 7, + NFIT_CMD_VENDOR_EFFECT_LOG = 8, + NFIT_CMD_VENDOR = 9, +}; + struct dsm_buffer { /* RAM page. */ uint32_t handle; @@ -366,6 +386,19 @@ exit: g_slist_free(list); } +static bool device_cmd_has_arg3[] = { + false, /* NFIT_CMD_IMPLEMENTED */ + false, /* NFIT_CMD_SMART */ + false, /* NFIT_CMD_SMART_THRESHOLD */ + false, /* NFIT_CMD_DIMM_FLAGS */ + false, /* NFIT_CMD_GET_CONFIG_SIZE */ + true, /* NFIT_CMD_GET_CONFIG_DATA */ + true, /* NFIT_CMD_SET_CONFIG_DATA */ + false, /* NFIT_CMD_VENDOR_EFFECT_LOG_SIZE */ + false, /* NFIT_CMD_VENDOR_EFFECT_LOG */ + false, /* NFIT_CMD_VENDOR */ +}; + #define BUILD_STA_METHOD(_dev_, _method_) \ do { \ _method_ = aml_method("_STA", 0); \ @@ -390,10 +423,20 @@ exit: static void build_nvdimm_devices(Aml *root_dev, GSList *list) { + Aml *has_arg3; + int i, cmd_nr; + + cmd_nr = ARRAY_SIZE(device_cmd_has_arg3); + has_arg3 = aml_package(cmd_nr); + for (i = 0; i < cmd_nr; i++) { + aml_append(has_arg3, aml_int(device_cmd_has_arg3[i])); + } + aml_append(root_dev, aml_name_decl("CAG3", has_arg3)); + for (; list; list = list->next) { PCNVDIMMDevice *nvdimm = list->data; uint32_t handle = nvdimm_index_to_handle(nvdimm->device_index); - Aml *dev, *method; + Aml *dev, *method, *ifctx; dev = aml_device("NVD%d", nvdimm->device_index); aml_append(dev, aml_name_decl("_ADR", aml_int(handle))); @@ -403,6 +446,34 @@ static void build_nvdimm_devices(Aml *root_dev, GSList *list) method = aml_method("_DSM", 4); { SAVE_ARG012_HANDLE(method, aml_int(handle)); + + /* Local5 = DeRefOf(Index(CAG3, Arg2)) */ + aml_append(method, + aml_store(aml_derefof(aml_index(aml_name("CAG3"), + aml_arg(2))), aml_local(5))); + /* if 0 < local5 */ + ifctx = aml_if(aml_lless(aml_int(0), aml_local(5))); + { + /* Local0 = Index(Arg3, 0) */ + aml_append(ifctx, aml_store(aml_index(aml_arg(3), aml_int(0)), + aml_local(0))); + /* Local1 = sizeof(Local0) */ + aml_append(ifctx, aml_store(aml_sizeof(aml_local(0)), + aml_local(1))); + /* Local2 = Local1 << 3 */ + aml_append(ifctx, aml_store(aml_shiftleft(aml_local(1), + aml_int(3)), aml_local(2))); + /* Local3 = DeRefOf(Local0) */ + aml_append(ifctx, aml_store(aml_derefof(aml_local(0)), + aml_local(3))); + /* CreateField(Local3, 0, local2, IBUF) */ + aml_append(ifctx, aml_create_field(aml_local(3), + aml_int(0), aml_local(2), "IBUF")); + /* ARG3 = IBUF */ + aml_append(ifctx, aml_store(aml_name("IBUF"), + aml_name("ARG3"))); + } + aml_append(method, ifctx); NOTIFY_AND_RETURN(method); } aml_append(dev, method);