From patchwork Wed Aug 5 16:51:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christopher Covington X-Patchwork-Id: 504101 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7C9DC1402A1 for ; Thu, 6 Aug 2015 02:59:17 +1000 (AEST) Received: from localhost ([::1]:41308 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZN227-0008Bg-Hj for incoming@patchwork.ozlabs.org; Wed, 05 Aug 2015 12:59:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZN1vB-000258-3z for qemu-devel@nongnu.org; Wed, 05 Aug 2015 12:52:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZN1vA-0004xG-2i for qemu-devel@nongnu.org; Wed, 05 Aug 2015 12:52:05 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:55247) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZN1v9-0004wx-Ph for qemu-devel@nongnu.org; Wed, 05 Aug 2015 12:52:04 -0400 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 44AB6140A1B; Wed, 5 Aug 2015 16:52:03 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id F2CD8140A21; Wed, 5 Aug 2015 16:52:02 +0000 (UTC) Received: from keeshans.qualcomm.com (rrcs-67-52-130-30.west.biz.rr.com [67.52.130.30]) (using TLSv1.1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: cov@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id D1F18140A18; Wed, 5 Aug 2015 16:51:59 +0000 (UTC) From: Christopher Covington To: qemu-devel@nongnu.org Date: Wed, 5 Aug 2015 12:51:20 -0400 Message-Id: <1438793483-12721-12-git-send-email-cov@codeaurora.org> X-Mailer: git-send-email 1.8.1.1 In-Reply-To: <1438793483-12721-1-git-send-email-cov@codeaurora.org> References: <1438793483-12721-1-git-send-email-cov@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 198.145.29.96 Cc: Christopher Covington Subject: [Qemu-devel] [RFC 11/14] Print bbvec stats on 'magic' exceptions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is necessary because we need a way to differentiate between instructions executed in a PID by the benchmark we care about and those executed by CRIU. Written by Aaron Lindsay. Signed-off-by: Christopher Covington --- bbv_profiler.c | 15 +++++++++++++++ bbv_profiler.h | 1 + target-arm/helper-a64.c | 10 ++++++++++ target-arm/helper.c | 12 ++++++++++++ 4 files changed, 38 insertions(+) diff --git a/bbv_profiler.c b/bbv_profiler.c index 51e8060..66984b2 100644 --- a/bbv_profiler.c +++ b/bbv_profiler.c @@ -19,6 +19,12 @@ #include #include "bbv_profiler.h" +/* Magic number, which is set as bits 16-31 of the target of a branch which + * causes an exception to send a signal to the plugin. + */ +#define BBV_MAGIC_NUM 0xdead +#define BBV_PRINT_STATS 0x0 + static BasicBlockTraceHandle trace = NULL; static uint32_t mode = 0; static uint64_t pid = 0; @@ -75,3 +81,12 @@ void bb_context_check_pid(uint64_t IC, uint64_t new_pid) bbvec_pid_change(trace, new_pid, IC); } } + +/* Check if the bbv plugin is being signaled to do something by an exception */ +void bb_check_exception(uint64_t pc) { + if (((pc >> 16) & 0xffff) == BBV_MAGIC_NUM) { + uint16_t value = pc & 0xffff; + if (value == BBV_PRINT_STATS) + bbvec_print_stats(trace); + } +} diff --git a/bbv_profiler.h b/bbv_profiler.h index 26dfa1f..b922451 100644 --- a/bbv_profiler.h +++ b/bbv_profiler.h @@ -31,5 +31,6 @@ int bbtrace_initialized(void); void bb_process(uint64_t PC, uint64_t IC); void bb_context_check_mode(uint64_t IC, uint32_t mode); void bb_context_check_pid(uint64_t IC, uint64_t tpid); +void bb_check_exception(uint64_t pc); #endif diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index e647b90..95eb096 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -27,6 +27,10 @@ #include "qemu/crc32c.h" #include /* For crc32 */ +#ifdef CONFIG_BBVEC +#include "bbv_profiler.h" +#endif // CONFIG_BBVEC + /* C2.4.7 Multiply and divide */ /* special cases for 0 and LLONG_MIN are mandated by the standard */ uint64_t HELPER(udiv64)(uint64_t num, uint64_t den) @@ -470,6 +474,12 @@ void aarch64_cpu_do_interrupt(CPUState *cs) uint64_t mask; #endif +#ifdef CONFIG_BBVEC + if (bbtrace_initialized()) { + bb_check_exception(is_a64(env) ? env->pc : env->regs[15]); + } +#endif + uint32_t syndrome = cs->exception_index == EXCP_ARMV8_HLT ? env->exception.syndrome & ~0xffff : diff --git a/target-arm/helper.c b/target-arm/helper.c index c1f4c47..297eb7c 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -4773,6 +4773,12 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) arm_log_exception(cs->exception_index); +#ifdef CONFIG_BBVEC + if (bbtrace_initialized()) { + bb_check_exception(env->regs[15]); + } +#endif + lr = 0xfffffff1; if (env->v7m.current_sp) lr |= 4; @@ -5074,6 +5080,12 @@ void arm_cpu_do_interrupt(CPUState *cs) return; } +#ifdef CONFIG_BBVEC + if (bbtrace_initialized()) { + bb_check_exception(env->regs[15]); + } +#endif + /* If this is a debug exception we must update the DBGDSCR.MOE bits */ switch (env->exception.syndrome >> ARM_EL_EC_SHIFT) { case EC_BREAKPOINT: