| Message ID | 1438356660-29760-1-git-send-email-aurelien@aurel32.net |
|---|---|
| State | New |
| Headers | show |
On 07/31/2015 08:31 AM, Aurelien Jarno wrote: > The add2 code in the tcg_out_addsub2 function doesn't take into account > the case where rl == al == bl. In that case we can't compute the carry > after the addition. As it corresponds to a multiplication by 2, the > carry bit is the bit 31. > > While this is a corner case, this prevents x86-64 guests to boot on a > MIPS host. > > Cc: Richard Henderson<rth@twiddle.net> > Signed-off-by: Aurelien Jarno<aurelien@aurel32.net> > --- > tcg/mips/tcg-target.c | 3 +++ > 1 file changed, 3 insertions(+) Reviewed-by: Richard Henderson <rth@twiddle.net> r~
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 064db46..e97980d 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1271,6 +1271,9 @@ static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh, TCGReg al, if (cbl) { tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl); tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); + } else if (rl == al && rl == bl) { + tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, 31); + tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); } else { tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, rl, (rl == bl ? al : bl));
The add2 code in the tcg_out_addsub2 function doesn't take into account the case where rl == al == bl. In that case we can't compute the carry after the addition. As it corresponds to a multiplication by 2, the carry bit is the bit 31. While this is a corner case, this prevents x86-64 guests to boot on a MIPS host. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> --- tcg/mips/tcg-target.c | 3 +++ 1 file changed, 3 insertions(+)