From patchwork Thu Jul 30 22:03:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 502321 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 846AC1402D5 for ; Fri, 31 Jul 2015 08:04:29 +1000 (AEST) Received: from localhost ([::1]:42195 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKvwB-0007UH-EO for incoming@patchwork.ozlabs.org; Thu, 30 Jul 2015 18:04:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41138) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKvvq-0006tL-CC for qemu-devel@nongnu.org; Thu, 30 Jul 2015 18:04:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZKvvp-0002Kr-GP for qemu-devel@nongnu.org; Thu, 30 Jul 2015 18:04:06 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:40058) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZKvvp-0002KF-B2 for qemu-devel@nongnu.org; Thu, 30 Jul 2015 18:04:05 -0400 Received: from weber.rr44.fr ([2001:bc8:30d7:120:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1ZKvvn-0006H7-U3; Fri, 31 Jul 2015 00:04:04 +0200 Received: from aurel32 by weber.rr44.fr with local (Exim 4.85) (envelope-from ) id 1ZKvvn-0002M9-08; Fri, 31 Jul 2015 00:04:03 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Fri, 31 Jul 2015 00:03:59 +0200 Message-Id: <1438293840-7569-3-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1438293840-7569-1-git-send-email-aurelien@aurel32.net> References: <1438293840-7569-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:100::1 Cc: Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH 2/3] tcg/mips: Mask TCGMemOp appropriately for indexing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition, but two cases were forgotten in the TCG MIPS backend. Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/mips/tcg-target.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 8dce19c..064db46 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1105,7 +1105,7 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l) static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, TCGReg base, TCGMemOp opc) { - switch (opc) { + switch (opc & (MO_SSIZE | MO_BSWAP)) { case MO_UB: tcg_out_opc_imm(s, OPC_LBU, datalo, base, 0); break; @@ -1195,7 +1195,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi, TCGReg base, TCGMemOp opc) { - switch (opc) { + switch (opc & (MO_SIZE | MO_BSWAP)) { case MO_8: tcg_out_opc_imm(s, OPC_SB, datalo, base, 0); break;