From patchwork Mon Jul 27 10:55:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 500336 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43FF614028F for ; Mon, 27 Jul 2015 20:59:00 +1000 (AEST) Received: from localhost ([::1]:52676 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJg7W-0006eh-7R for incoming@patchwork.ozlabs.org; Mon, 27 Jul 2015 06:58:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38948) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJg4y-00022l-5Y for qemu-devel@nongnu.org; Mon, 27 Jul 2015 06:56:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZJg4v-0005eJ-F9 for qemu-devel@nongnu.org; Mon, 27 Jul 2015 06:56:20 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:42632) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZJg4v-0005dB-7q for qemu-devel@nongnu.org; Mon, 27 Jul 2015 06:56:17 -0400 Received: from weber.rr44.fr ([2001:bc8:30d7:120:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1ZJg4s-0005H2-Mo; Mon, 27 Jul 2015 12:56:14 +0200 Received: from aurel32 by weber.rr44.fr with local (Exim 4.85) (envelope-from ) id 1ZJg4s-00023I-2r; Mon, 27 Jul 2015 12:56:14 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Mon, 27 Jul 2015 12:55:59 +0200 Message-Id: <1437994568-7825-4-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1437994568-7825-1-git-send-email-aurelien@aurel32.net> References: <1437994568-7825-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:100::1 Cc: Paolo Bonzini , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH v2 for-2.5 03/12] tcg/optimize: optimize temps tracking X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The tcg_temp_info structure uses 24 bytes per temp. Now that we emulate vector registers on most guests, it's not uncommon to have more than 100 used temps. This means we have initialize more than 2kB at least twice per TB, often more when there is a few goto_tb. Instead used a TCGTempSet bit array to track which temps are in used in the current basic block. This means there are only around 16 bytes to initialize. This improves the boot time of a MIPS guest on an x86-64 host by around 7% and moves out tcg_optimize from the the top of the profiler list. Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- tcg/optimize.c | 36 +++++++++++++++++++++++++----------- 1 file changed, 25 insertions(+), 11 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index cd0e793..425c14b 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -50,6 +50,7 @@ struct tcg_temp_info { }; static struct tcg_temp_info temps[TCG_MAX_TEMPS]; +static TCGTempSet temps_used; /* Reset TEMP's state to TCG_TEMP_UNDEF. If TEMP only had one copy, remove the copy flag from the left temp. */ @@ -67,6 +68,22 @@ static void reset_temp(TCGArg temp) temps[temp].mask = -1; } +/* Reset all temporaries, given that there are NB_TEMPS of them. */ +static void reset_all_temps(int nb_temps) +{ + bitmap_zero(temps_used.l, nb_temps); +} + +/* Initialize and activate a temporary. */ +static void init_temp_info(TCGArg temp) +{ + if (!test_bit(temp, temps_used.l)) { + temps[temp].state = TCG_TEMP_UNDEF; + temps[temp].mask = -1; + set_bit(temp, temps_used.l); + } +} + static TCGOp *insert_op_before(TCGContext *s, TCGOp *old_op, TCGOpcode opc, int nargs) { @@ -98,16 +115,6 @@ static TCGOp *insert_op_before(TCGContext *s, TCGOp *old_op, return new_op; } -/* Reset all temporaries, given that there are NB_TEMPS of them. */ -static void reset_all_temps(int nb_temps) -{ - int i; - for (i = 0; i < nb_temps; i++) { - temps[i].state = TCG_TEMP_UNDEF; - temps[i].mask = -1; - } -} - static int op_bits(TCGOpcode op) { const TCGOpDef *def = &tcg_op_defs[op]; @@ -606,6 +613,11 @@ void tcg_optimize(TCGContext *s) nb_iargs = def->nb_iargs; } + /* Initialize the temps that are going to be used */ + for (i = 0; i < nb_oargs + nb_iargs; i++) { + init_temp_info(args[i]); + } + /* Do copy propagation */ for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) { if (temps[args[i]].state == TCG_TEMP_COPY) { @@ -1299,7 +1311,9 @@ void tcg_optimize(TCGContext *s) if (!(args[nb_oargs + nb_iargs + 1] & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) { for (i = 0; i < nb_globals; i++) { - reset_temp(i); + if (test_bit(i, temps_used.l)) { + reset_temp(i); + } } } goto do_reset_output;