From patchwork Fri Jun 26 18:01:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 488953 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D815F140284 for ; Sat, 27 Jun 2015 04:01:52 +1000 (AEST) Received: from localhost ([::1]:33329 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8Xwj-0006qr-Qb for incoming@patchwork.ozlabs.org; Fri, 26 Jun 2015 14:01:49 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36716) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8XwT-0006Xe-PC for qemu-devel@nongnu.org; Fri, 26 Jun 2015 14:01:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z8XwO-00055k-DD for qemu-devel@nongnu.org; Fri, 26 Jun 2015 14:01:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57086) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8XwO-00055b-5W for qemu-devel@nongnu.org; Fri, 26 Jun 2015 14:01:28 -0400 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (Postfix) with ESMTPS id 775C119F3AF; Fri, 26 Jun 2015 18:01:27 +0000 (UTC) Received: from ul30vt.home (ovpn-113-121.phx2.redhat.com [10.3.113.121]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t5QI1Ppu003758; Fri, 26 Jun 2015 14:01:25 -0400 Message-ID: <1435341685.3700.479.camel@redhat.com> From: Alex Williamson To: Gabriel Laupre Date: Fri, 26 Jun 2015 12:01:25 -0600 In-Reply-To: <1435278602-5454-1-git-send-email-glaupre@chelsio.com> References: <1435278602-5454-1-git-send-email-glaupre@chelsio.com> Mime-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: jb-gnumlists@wisemo.com, leedom@chelsio.com, mst@redhat.com, qemu-devel@nongnu.org, anish@chelsio.com, mboksanyi@chelsio.com, bsd@makefile.in Subject: Re: [Qemu-devel] [PATCH v2] pci : Add pba_offset PCI quirk for Chelsio T5 devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On Thu, 2015-06-25 at 17:30 -0700, Gabriel Laupre wrote: > Fix pba_offset initialization value for Chelsio T5 Virtual Function > device. The T5 hardware has a bug in it where it reports a Pending Interrupt > Bit Array Offset of 0x8000 for its SR-IOV Virtual Functions instead > of the 0x1000 that the hardware actually uses internally. As the hardware > doesn't return the correct pba_offset value, add a quirk to instead > return a hardcoded value of 0x1000 when a Chelsio T5 VF device is > detected. > > This bug has been fixed in the Chelsio's next chip series T6 but there are > no plans to respin the T5 ASIC for this bug. It is just documented in the > T5 Errata and left it at that. > > v2 : Replace and PCI_DEVICE_ID_CHELSIO_T5_SERIES_VF macro definition with > the Chelsio's T5 VF devices identifier schema of 0x58xx > > Signed-off-by: Gabriel Laupre > --- > hw/vfio/pci.c | 12 ++++++++++++ > include/hw/pci/pci_ids.h | 2 ++ > 2 files changed, 14 insertions(+) > > diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c > index e0e339a..5f35f61 100644 > --- a/hw/vfio/pci.c > +++ b/hw/vfio/pci.c > @@ -2220,6 +2220,9 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev) > uint16_t ctrl; > uint32_t table, pba; > int fd = vdev->vbasedev.fd; > + PCIDevice *pdev = &vdev->pdev; > + uint16_t vendor = pci_get_word(pdev->config + PCI_VENDOR_ID); > + uint16_t device = pci_get_word(pdev->config + PCI_DEVICE_ID); > > pos = pci_find_capability(&vdev->pdev, PCI_CAP_ID_MSIX); > if (!pos) { > @@ -2252,6 +2255,15 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev) > vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; > vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; > > + /* Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5 > + * adapters. The T5 hardware returns an incorrect value of 0x8000 for the > + * VF PBA offset. The correct value is 0x1000, so we hard code that here. > + */ > + if (vendor == PCI_VENDOR_ID_CHELSIO && > + (device & 0xff00) == 0x5800) { > + vdev->msix->pba_offset = 0x1000; > + } > + > trace_vfio_early_setup_msix(vdev->vbasedev.name, pos, > vdev->msix->table_bar, > vdev->msix->table_offset, I believe I suggested something like this: > diff --git a/include/hw/pci/pci_ids.h b/include/hw/pci/pci_ids.h > index 49c062b..d98e6c9 100644 > --- a/include/hw/pci/pci_ids.h > +++ b/include/hw/pci/pci_ids.h > @@ -114,6 +114,8 @@ > #define PCI_VENDOR_ID_ENSONIQ 0x1274 > #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 > > +#define PCI_VENDOR_ID_CHELSIO 0x1425 > + > #define PCI_VENDOR_ID_FREESCALE 0x1957 > #define PCI_DEVICE_ID_MPC8533E 0x0030 > --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -2252,6 +2252,33 @@ static int vfio_early_setup_msix(VFIOPCIDevice *vdev) vdev->msix->pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK; vdev->msix->entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1; + /* + * We could be more thorough here, but msix_init() will do further + * testing, look for the obviously broken configs and apply any quirks. + */ + if (vdev->msix->table_offset >= + vdev->bars[vdev->msix->table_bar].region.size || + vdev->msix->pba_offset >= + vdev->bars[vdev->msix->pba_bar].region.size) { + PCIDevice *pdev = &vdev->pdev; + uint16_t vendor = pci_get_word(pdev->config + PCI_VENDOR_ID); + uint16_t device = pci_get_word(pdev->config + PCI_DEVICE_ID); + + /* + * Chelsio T5 Virtual Function devices are encoded as 0x58xx for T5 + * adapters. The T5 hardware returns an incorrect value of 0x8000 + * for the VF PBA offset while the BAR itself is only 8K. The + * correct value is 0x1000, so we hard code that here. + */ + if (vendor == PCI_VENDOR_ID_CHELSIO && (device & 0xff00) == 0x5800) { + vdev->msix->pba_offset = 0x1000; + } else { + error_report("vfio: Hardware reports invalid configuration, " + "MSIX data outside of specified BAR"); + return -EINVAL; + } + } + trace_vfio_early_setup_msix(vdev->vbasedev.name, pos, vdev->msix->table_bar, vdev->msix->table_offset,