From patchwork Fri Jun 26 14:49:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 488903 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0DDCD140187 for ; Sat, 27 Jun 2015 01:23:47 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=M2SbF0Z9; dkim-atps=neutral Received: from localhost ([::1]:60719 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8VTk-00034p-Uy for incoming@patchwork.ozlabs.org; Fri, 26 Jun 2015 11:23:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57686) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8Uyj-0006I5-QC for qemu-devel@nongnu.org; Fri, 26 Jun 2015 10:51:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z8Uyi-0002oP-Ra for qemu-devel@nongnu.org; Fri, 26 Jun 2015 10:51:41 -0400 Received: from mail-qg0-x231.google.com ([2607:f8b0:400d:c04::231]:35573) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z8Uyi-0002oI-Nm for qemu-devel@nongnu.org; Fri, 26 Jun 2015 10:51:40 -0400 Received: by qgeu36 with SMTP id u36so35953371qge.2 for ; Fri, 26 Jun 2015 07:51:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type:content-transfer-encoding; bh=RAWK3qGieIv0D3P1HiLhr3/74gfLXu3HoxAUgDq0yZU=; b=M2SbF0Z9ejkIouwTU00IyP/9YWLuIhH02mZPw4GC/4L0Vjvissc93lxWjk1vlqYlpX KU4uaHPfMJqYdVWdtLmwzqpsz3VGAQQ2MqAZokPF+KVoC3oU+DnDZg9N9EhD7TL1bZ2N F1Bm7fQSvRh+vfAAK0SvQyEQc7H/dlBpymTCpv/yuJQ0nvyEcC2CDUkroEehqjYOgKdg fMmx0xNI0VByY6Dp48BD8LwrA572KphizH8GQ73MoRgfPenJpFvKFCeBZPr2+QqSkmwv oIWm5IQXl//9XOTAtE4ZbhZ/7+iqG6vrBo30PWuU6cOgrUZ+GdO51HY3rcifFYUE+f/h 5D7A== X-Received: by 10.140.145.78 with SMTP id 75mr2846854qhr.61.1435330300429; Fri, 26 Jun 2015 07:51:40 -0700 (PDT) Received: from localhost (bne75-h02-31-39-163-232.dsl.sta.abo.bbox.fr. [31.39.163.232]) by mx.google.com with ESMTPSA id a26sm6930070qka.0.2015.06.26.07.51.39 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 26 Jun 2015 07:51:39 -0700 (PDT) From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= To: qemu-devel@nongnu.org Date: Fri, 26 Jun 2015 16:49:43 +0200 Message-Id: <1435330185-23248-38-git-send-email-marcandre.lureau@gmail.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1435330185-23248-1-git-send-email-marcandre.lureau@gmail.com> References: <1435330185-23248-1-git-send-email-marcandre.lureau@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400d:c04::231 Cc: cam@cs.ualberta.ca, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , stefanha@redhat.com Subject: [Qemu-devel] [PATCH 37/39] msix: implement read-only pba write X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org qpci_msix_pending() writes on pba region, causing qemu to SEGV: Implement an empty mmio write to avoid the crash. Signed-off-by: Marc-André Lureau --- hw/pci/msix.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/pci/msix.c b/hw/pci/msix.c index 7716bf3..e91b2cb 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -200,8 +200,14 @@ static uint64_t msix_pba_mmio_read(void *opaque, hwaddr addr, return pci_get_long(dev->msix_pba + addr); } +static void msix_pba_mmio_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ +} + static const MemoryRegionOps msix_pba_mmio_ops = { .read = msix_pba_mmio_read, + .write = msix_pba_mmio_write, .endianness = DEVICE_LITTLE_ENDIAN, .valid = { .min_access_size = 4,