From patchwork Fri Jun 12 22:45:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 483779 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A77BF14028F for ; Sat, 13 Jun 2015 08:46:58 +1000 (AEST) Received: from localhost ([::1]:54143 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3Xix-0006o9-Sc for incoming@patchwork.ozlabs.org; Fri, 12 Jun 2015 18:46:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3XiP-0005s1-FS for qemu-devel@nongnu.org; Fri, 12 Jun 2015 18:46:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z3XiO-0004fI-Cz for qemu-devel@nongnu.org; Fri, 12 Jun 2015 18:46:21 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:35116) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z3XiO-0004e4-6e for qemu-devel@nongnu.org; Fri, 12 Jun 2015 18:46:20 -0400 Received: from weber.rr44.fr ([2001:470:d4ed:0:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1Z3XiD-0003pu-I4; Sat, 13 Jun 2015 00:46:09 +0200 Received: from aurel32 by weber.rr44.fr with local (Exim 4.85) (envelope-from ) id 1Z3XiB-0004MM-Do; Sat, 13 Jun 2015 00:46:07 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Sat, 13 Jun 2015 00:45:53 +0200 Message-Id: <1434149163-16639-6-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1434149163-16639-1-git-send-email-aurelien@aurel32.net> References: <1434149163-16639-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:101::1 Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH 05/15] target-s390x: add PER related constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Cc: Alexander Graf Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- target-s390x/cpu.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 584e74b..4ff3f5c 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -364,6 +364,22 @@ static inline int get_ilen(uint8_t opc) } } +/* PER bits from control register 9 */ +#define PER_CR9_EVENT_BRANCH 0x80000000 +#define PER_CR9_EVENT_IFETCH 0x40000000 +#define PER_CR9_EVENT_STORE 0x20000000 +#define PER_CR9_EVENT_STORE_REAL 0x08000000 +#define PER_CR9_EVENT_NULLIFICATION 0x01000000 +#define PER_CR9_CONTROL_BRANCH_ADDRESS 0x00800000 +#define PER_CR9_CONTROL_ALTERATION 0x00200000 + +/* PER bits from the PER CODE/ATMID/AI in lowcore */ +#define PER_CODE_EVENT_BRANCH 0x8000 +#define PER_CODE_EVENT_IFETCH 0x4000 +#define PER_CODE_EVENT_STORE 0x2000 +#define PER_CODE_EVENT_STORE_REAL 0x0800 +#define PER_CODE_EVENT_NULLIFICATION 0x0100 + #ifndef CONFIG_USER_ONLY /* In several cases of runtime exceptions, we havn't recorded the true instruction length. Use these codes when raising exceptions in order