From patchwork Wed Jun 3 21:09:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 480229 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D9E0D1401DE for ; Thu, 4 Jun 2015 07:18:28 +1000 (AEST) Received: from localhost ([::1]:38270 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0G3P-0008RV-1q for incoming@patchwork.ozlabs.org; Wed, 03 Jun 2015 17:18:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60486) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0FvL-0001OR-94 for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0FvI-0007rz-8A for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:07 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:40075) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0FvH-0007pM-Qa for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:04 -0400 Received: from weber.rr44.fr ([2001:470:d4ed:0:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1Z0FvF-0003Wf-Sc; Wed, 03 Jun 2015 23:10:02 +0200 Received: from aurel32 by weber.rr44.fr with local (Exim 4.85) (envelope-from ) id 1Z0FvE-0000Pi-VX; Wed, 03 Jun 2015 23:10:00 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Wed, 3 Jun 2015 23:09:46 +0200 Message-Id: <1433365796-1118-7-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1433365796-1118-1-git-send-email-aurelien@aurel32.net> References: <1433365796-1118-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:101::1 Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH v2 06/16] target-s390x: implement LOAD FP INTEGER instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is needed to pass the gcc.c-torture/execute/ieee/20010114-2.c test in the gcc testsuite. Cc: Alexander Graf Cc: Richard Henderson Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson --- target-s390x/fpu_helper.c | 31 +++++++++++++++++++++++++++++++ target-s390x/helper.h | 3 +++ target-s390x/insn-data.def | 4 ++++ target-s390x/translate.c | 25 +++++++++++++++++++++++++ 4 files changed, 63 insertions(+) diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c index 96eabb6..45b7ddf 100644 --- a/target-s390x/fpu_helper.c +++ b/target-s390x/fpu_helper.c @@ -552,6 +552,37 @@ uint64_t HELPER(clfxb)(CPUS390XState *env, uint64_t h, uint64_t l, uint32_t m3) return ret; } +/* round to integer 32-bit */ +uint64_t HELPER(fieb)(CPUS390XState *env, uint64_t f2, uint32_t m3) +{ + int hold = swap_round_mode(env, m3); + float32 ret = float32_round_to_int(f2, &env->fpu_status); + set_float_rounding_mode(hold, &env->fpu_status); + handle_exceptions(env, GETPC()); + return ret; +} + +/* round to integer 64-bit */ +uint64_t HELPER(fidb)(CPUS390XState *env, uint64_t f2, uint32_t m3) +{ + int hold = swap_round_mode(env, m3); + float64 ret = float64_round_to_int(f2, &env->fpu_status); + set_float_rounding_mode(hold, &env->fpu_status); + handle_exceptions(env, GETPC()); + return ret; +} + +/* round to integer 128-bit */ +uint64_t HELPER(fixb)(CPUS390XState *env, uint64_t ah, uint64_t al, uint32_t m3) +{ + int hold = swap_round_mode(env, m3); + float128 ret = float128_round_to_int(make_float128(ah, al), + &env->fpu_status); + set_float_rounding_mode(hold, &env->fpu_status); + handle_exceptions(env, GETPC()); + return RET128(ret); +} + /* 32-bit FP multiply and add */ uint64_t HELPER(maeb)(CPUS390XState *env, uint64_t f1, uint64_t f2, uint64_t f3) diff --git a/target-s390x/helper.h b/target-s390x/helper.h index e6f2afb..cb0b421 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -60,6 +60,9 @@ DEF_HELPER_FLAGS_4(clgxb, TCG_CALL_NO_WG, i64, env, i64, i64, i32) DEF_HELPER_FLAGS_3(clfeb, TCG_CALL_NO_WG, i64, env, i64, i32) DEF_HELPER_FLAGS_3(clfdb, TCG_CALL_NO_WG, i64, env, i64, i32) DEF_HELPER_FLAGS_4(clfxb, TCG_CALL_NO_WG, i64, env, i64, i64, i32) +DEF_HELPER_FLAGS_3(fieb, TCG_CALL_NO_WG, i64, env, i64, i32) +DEF_HELPER_FLAGS_3(fidb, TCG_CALL_NO_WG, i64, env, i64, i32) +DEF_HELPER_FLAGS_4(fixb, TCG_CALL_NO_WG, i64, env, i64, i64, i32) DEF_HELPER_FLAGS_4(maeb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(madb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) DEF_HELPER_FLAGS_4(mseb, TCG_CALL_NO_WG, i64, env, i64, i64, i64) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 8325684..a12939d 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -479,6 +479,10 @@ C(0xb29d, LFPC, S, Z, 0, m2_32u, 0, 0, sfpc, 0) /* LOAD FPC AND SIGNAL */ C(0xb2bd, LFAS, S, IEEEE_SIM, 0, m2_32u, 0, 0, sfas, 0) +/* LOAD FP INTEGER */ + C(0xb357, FIEBR, RRF_e, Z, 0, e2, new, e1, fieb, 0) + C(0xb35f, FIDBR, RRF_e, Z, 0, f2_o, f1, 0, fidb, 0) + C(0xb347, FIXBR, RRF_e, Z, 0, x2_o, x1, 0, fixb, 0) /* LOAD LENGTHENED */ C(0xb304, LDEBR, RRE, Z, 0, e2, f1, 0, ldeb, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index c7ebd21..b0dbfe8 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -2116,6 +2116,31 @@ static ExitStatus op_ex(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_fieb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + gen_helper_fieb(o->out, cpu_env, o->in2, m3); + tcg_temp_free_i32(m3); + return NO_EXIT; +} + +static ExitStatus op_fidb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + gen_helper_fidb(o->out, cpu_env, o->in2, m3); + tcg_temp_free_i32(m3); + return NO_EXIT; +} + +static ExitStatus op_fixb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + gen_helper_fixb(o->out, cpu_env, o->in1, o->in2, m3); + return_low128(o->out2); + tcg_temp_free_i32(m3); + return NO_EXIT; +} + static ExitStatus op_flogr(DisasContext *s, DisasOps *o) { /* We'll use the original input for cc computation, since we get to