From patchwork Wed Jun 3 21:09:53 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 480220 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id AF6411401DE for ; Thu, 4 Jun 2015 07:12:56 +1000 (AEST) Received: from localhost ([::1]:38214 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0Fy2-0006Tr-P3 for incoming@patchwork.ozlabs.org; Wed, 03 Jun 2015 17:12:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60521) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0FvL-0001PK-VW for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z0FvI-0007tS-Kb for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:07 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:40106) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z0FvI-0007sT-FO for qemu-devel@nongnu.org; Wed, 03 Jun 2015 17:10:04 -0400 Received: from weber.rr44.fr ([2001:470:d4ed:0:7e05:7ff:fe0d:f152]) by hall.aurel32.net with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84) (envelope-from ) id 1Z0FvG-0003Wn-9u; Wed, 03 Jun 2015 23:10:02 +0200 Received: from aurel32 by weber.rr44.fr with local (Exim 4.85) (envelope-from ) id 1Z0FvF-0000QH-8c; Wed, 03 Jun 2015 23:10:01 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Wed, 3 Jun 2015 23:09:53 +0200 Message-Id: <1433365796-1118-14-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1433365796-1118-1-git-send-email-aurelien@aurel32.net> References: <1433365796-1118-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:bc8:30d7:101::1 Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Subject: [Qemu-devel] [PATCH v2 13/16] target-s390x: add a cpu_mmu_idx_to_asc function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Use constants to define the MMU indexes, and add a function to do the reverse conversion of cpu_mmu_index. Cc: Alexander Graf Cc: Richard Henderson Signed-off-by: Aurelien Jarno Reviewed-by: Richard Henderson --- target-s390x/cpu.h | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index adb9a84..584e74b 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -302,15 +302,20 @@ static inline CPU_DoubleU *get_freg(CPUS390XState *cs, int nr) #define CR0_LOWPROT 0x0000000010000000ULL #define CR0_EDAT 0x0000000000800000ULL +/* MMU */ +#define MMU_PRIMARY_IDX 0 +#define MMU_SECONDARY_IDX 1 +#define MMU_HOME_IDX 2 + static inline int cpu_mmu_index (CPUS390XState *env) { switch (env->psw.mask & PSW_MASK_ASC) { case PSW_ASC_PRIMARY: - return 0; + return MMU_PRIMARY_IDX; case PSW_ASC_SECONDARY: - return 1; + return MMU_SECONDARY_IDX; case PSW_ASC_HOME: - return 2; + return MMU_HOME_IDX; case PSW_ASC_ACCREG: /* Fallthrough: access register mode is not yet supported */ default: @@ -318,6 +323,20 @@ static inline int cpu_mmu_index (CPUS390XState *env) } } +static inline uint64_t cpu_mmu_idx_to_asc(int mmu_idx) +{ + switch (mmu_idx) { + case MMU_PRIMARY_IDX: + return PSW_ASC_PRIMARY; + case MMU_SECONDARY_IDX: + return PSW_ASC_SECONDARY; + case MMU_HOME_IDX: + return PSW_ASC_HOME; + default: + abort(); + } +} + static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, target_ulong *cs_base, int *flags) {