From patchwork Wed Apr 15 16:02:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Bellows X-Patchwork-Id: 461587 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 50E951401DE for ; Thu, 16 Apr 2015 02:10:32 +1000 (AEST) Received: from localhost ([::1]:33012 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiPtV-0005uW-G4 for incoming@patchwork.ozlabs.org; Wed, 15 Apr 2015 12:10:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52314) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiPme-0002iS-0Y for qemu-devel@nongnu.org; Wed, 15 Apr 2015 12:03:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YiPmY-0001z0-B0 for qemu-devel@nongnu.org; Wed, 15 Apr 2015 12:03:23 -0400 Received: from mail-oi0-f51.google.com ([209.85.218.51]:33303) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiPmY-0001yv-6i for qemu-devel@nongnu.org; Wed, 15 Apr 2015 12:03:18 -0400 Received: by oica37 with SMTP id a37so26933526oic.0 for ; Wed, 15 Apr 2015 09:03:17 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FWInzM+qw348XfLuKasK6FXD8fDLaoazdcymXj/DmQs=; b=b9Mz8xaEtqVPaNUtZ9eBVb4k6zmjDyrStTqxxXvaUXQ7aDNfK26Z7kvnYGUcy4h7XY h1BxCBm/d8OdWfi+JTT9rPttKzb2Pp45FI+vOCM/7xok60wWX1mXGB3LpXFCSuwg29Nw WJrHlJySCZICquYvHdxe9XP0JN04K0PmMCiHLCEQGMIRoBt52IAY/Ol2T0w8nS97W/Va 5OAfh+yPtuexiEi4las6DwUh4O3cu5ymtpUcgKje1csz14KXDBUTfBnUEeNFBd8EF39K VXqsc3E0i/KPUXj9MLzXQauIB3onXGja8hg0MBUsWfnuPr5jlElvfovpiB9Q3+113+NG uNjg== X-Gm-Message-State: ALoCoQkn10qW5HI5eOBdu0y2jOH+S1xNljhlQS2nfB62wyubB/lA1sd7AdcGnhpifcQCEC9wNlbc X-Received: by 10.202.79.210 with SMTP id d201mr5063286oib.65.1429113759119; Wed, 15 Apr 2015 09:02:39 -0700 (PDT) Received: from gbellows-linaro.gateway.pace.com (99-179-1-214.lightspeed.austtx.sbcglobal.net. [99.179.1.214]) by mx.google.com with ESMTPSA id x142sm2567707oie.19.2015.04.15.09.02.37 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 15 Apr 2015 09:02:37 -0700 (PDT) From: Greg Bellows To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 15 Apr 2015 11:02:11 -0500 Message-Id: <1429113742-8371-6-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1429113742-8371-1-git-send-email-greg.bellows@linaro.org> References: <1429113742-8371-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.218.51 Cc: Fabian Aggeler , Greg Bellows Subject: [Qemu-devel] [PATCH v3 05/16] hw/intc/arm_gic: Add ns_access() function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Fabian Aggeler Security Extensions for GICv1 and GICv2 use register banking to provide transparent access to seperate Secure and Non-secure copies of GIC configuration registers. This function will later be replaced by code determining the security state of a read/write access to a register. Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows --- hw/intc/arm_gic.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index cdf7408..e0bce6e 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -45,6 +45,13 @@ static inline int gic_get_current_cpu(GICState *s) return 0; } +/* Security state of a read / write access */ +static inline bool ns_access(void) +{ + /* TODO: use actual security state */ + return true; +} + /* TODO: Many places that call this routine could be optimized. */ /* Update interrupt status after enabled or pending bits have been changed. */ void gic_update(GICState *s)