From patchwork Wed Apr 15 16:02:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Bellows X-Patchwork-Id: 461590 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B03D51401DE for ; Thu, 16 Apr 2015 02:12:24 +1000 (AEST) Received: from localhost ([::1]:33027 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiPvK-0000Wr-71 for incoming@patchwork.ozlabs.org; Wed, 15 Apr 2015 12:12:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52385) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiPmk-0002vK-Ne for qemu-devel@nongnu.org; Wed, 15 Apr 2015 12:03:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YiPmh-00022b-Gj for qemu-devel@nongnu.org; Wed, 15 Apr 2015 12:03:30 -0400 Received: from mail-ob0-f171.google.com ([209.85.214.171]:36363) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YiPmh-00022N-4D for qemu-devel@nongnu.org; Wed, 15 Apr 2015 12:03:27 -0400 Received: by obbeb7 with SMTP id eb7so26093197obb.3 for ; Wed, 15 Apr 2015 09:03:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S9MYYZdyQmk21HXlUcrAk2uat4jG/rXw63ECF911obE=; b=i6T+hJj+eMVP09Oqn7DIfvZmO5obyda7dHc+CfdcLCvBEj7jxk0ARcBKPH20CxbFpB 5DJigXYJptC1mRlgGRzRlWfuMKuE//DLQG4hXouwiLnePE5sCOHlwx38L4h8CtflRkPm izzk73Qd6ccXg6idr55+W70FUhTW+0PgdwGGLqAozt8PCHSiCYTlOxViJgBNFXCTq0Bn tQaGfcBfkEt9QK6bzc9/goga1779F7SJnITO9k4nqaq+hkU2FQurMYCJv6KhORGZW5Ky uv7NDwIf1mxcsmA03X36e95aDre7pVe0WK29JD+8ODIipAfTXaMr/PdeS+Z4tiEIFmCk 9hpw== X-Gm-Message-State: ALoCoQlYoEoVfBwvO9+EH5bAxWbd12b2Y7gEVmH59rmDRYi2oFeeq9cJRoEybyEro4EoWnj1F+Xi X-Received: by 10.202.191.11 with SMTP id p11mr16164917oif.69.1429113777423; Wed, 15 Apr 2015 09:02:57 -0700 (PDT) Received: from gbellows-linaro.gateway.pace.com (99-179-1-214.lightspeed.austtx.sbcglobal.net. [99.179.1.214]) by mx.google.com with ESMTPSA id x142sm2567707oie.19.2015.04.15.09.02.55 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 15 Apr 2015 09:02:56 -0700 (PDT) From: Greg Bellows To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 15 Apr 2015 11:02:21 -0500 Message-Id: <1429113742-8371-16-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1429113742-8371-1-git-send-email-greg.bellows@linaro.org> References: <1429113742-8371-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.214.171 Cc: Fabian Aggeler , Greg Bellows Subject: [Qemu-devel] [PATCH v3 15/16] hw/intc/arm_gic: Break out gic_update() function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Fabian Aggeler Prepare to split gic_update() in two functions, one for GICs with interrupt grouping and one without grouping (existing). Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows --- hw/intc/arm_gic.c | 11 ++++++++--- hw/intc/gic_internal.h | 1 + 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 781cca9..c03b3dd 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -52,9 +52,7 @@ static inline bool ns_access(void) return true; } -/* TODO: Many places that call this routine could be optimized. */ -/* Update interrupt status after enabled or pending bits have been changed. */ -void gic_update(GICState *s) +inline void gic_update_no_grouping(GICState *s) { int best_irq; int best_prio; @@ -93,6 +91,13 @@ void gic_update(GICState *s) } } +/* TODO: Many places that call this routine could be optimized. */ +/* Update interrupt status after enabled or pending bits have been changed. */ +void gic_update(GICState *s) +{ + gic_update_no_grouping(s); +} + void gic_set_pending_private(GICState *s, int cpu, int irq) { int cm = 1 << cpu; diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h index 13fe5a6..e16a7e5 100644 --- a/hw/intc/gic_internal.h +++ b/hw/intc/gic_internal.h @@ -73,6 +73,7 @@ void gic_set_pending_private(GICState *s, int cpu, int irq); uint32_t gic_acknowledge_irq(GICState *s, int cpu); void gic_complete_irq(GICState *s, int cpu, int irq); +inline void gic_update_no_grouping(GICState *s); void gic_update(GICState *s); void gic_init_irqs_and_distributor(GICState *s); void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val);