From patchwork Wed Mar 11 18:38:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 449134 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8E99014015A for ; Thu, 12 Mar 2015 05:42:11 +1100 (AEDT) Received: from localhost ([::1]:56341 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVla5-0007eY-J8 for incoming@patchwork.ozlabs.org; Wed, 11 Mar 2015 14:42:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49925) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVlXG-0003I4-WF for qemu-devel@nongnu.org; Wed, 11 Mar 2015 14:39:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YVlXB-0007BE-85 for qemu-devel@nongnu.org; Wed, 11 Mar 2015 14:39:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54763) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YVlXB-0007B9-0d for qemu-devel@nongnu.org; Wed, 11 Mar 2015 14:39:09 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id t2BId7ma007055 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 11 Mar 2015 14:39:07 -0400 Received: from hawk.usersys.redhat.com (dhcp-27-195.brq.redhat.com [10.34.27.195]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t2BId3hB031939; Wed, 11 Mar 2015 14:39:06 -0400 From: Andrew Jones To: qemu-devel@nongnu.org Date: Wed, 11 Mar 2015 19:38:58 +0100 Message-Id: <1426099139-14463-3-git-send-email-drjones@redhat.com> In-Reply-To: <1426099139-14463-1-git-send-email-drjones@redhat.com> References: <1426099139-14463-1-git-send-email-drjones@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: peter.maydell@linaro.org Subject: [Qemu-devel] [PATCH v4 2/3] target-arm: fix get_phys_addr_v6/SCTLR_AFE access check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce simple_ap_to_rw_prot(), which has the same behavior as ap_to_rw_prot(), but takes the 2-bit simple AP[2:1] instead of the 3-bit AP[2:0]. Use this in get_phys_addr_v6 when SCTLR_AFE is set, as that bit indicates we should be using the simple AP format. It's unlikely this path is getting used. I don't see CR_AFE getting used by Linux, so possibly not. If it had been, then the check would have been wrong for all but AP[2:1] = 0b11. Anyway, this should fix it up, in case it ever does get used. Signed-off-by: Andrew Jones Reviewed-by: Peter Maydell --- target-arm/helper.c | 49 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index d1e70a86a647c..d996659652f8d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -4905,6 +4905,11 @@ static inline bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx) /* Translate section/page access permissions to page * R/W protection flags + * + * @env: CPUARMState + * @mmu_idx: MMU index indicating required translation regime + * @ap: The 3-bit access permissions (AP[2:0]) + * @domain_prot: The 2-bit domain access permissions */ static inline int ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap, int domain_prot) @@ -4954,6 +4959,32 @@ static inline int ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, } } +/* Translate section/page access permissions to page + * R/W protection flags. + * + * @env: CPUARMState + * @mmu_idx: MMU index indicating required translation regime + * @ap: The 2-bit simple AP (AP[2:1]) + */ +static inline int +simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap) +{ + bool is_user = regime_is_user(env, mmu_idx); + + switch (ap) { + case 0: + return is_user ? 0 : PAGE_READ | PAGE_WRITE; + case 1: + return PAGE_READ | PAGE_WRITE; + case 2: + return is_user ? 0 : PAGE_READ; + case 3: + return PAGE_READ; + default: + g_assert_not_reached(); + } +} + static bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx, uint32_t *table, uint32_t address) { @@ -5186,14 +5217,18 @@ static int get_phys_addr_v6(CPUARMState *env, uint32_t address, int access_type, if (xn && access_type == 2) goto do_fault; - /* The simplified model uses AP[0] as an access control bit. */ - if ((regime_sctlr(env, mmu_idx) & SCTLR_AFE) - && (ap & 1) == 0) { - /* Access flag fault. */ - code = (code == 15) ? 6 : 3; - goto do_fault; + if (arm_feature(env, ARM_FEATURE_V6K) && + (regime_sctlr(env, mmu_idx) & SCTLR_AFE)) { + /* The simplified model uses AP[0] as an access control bit. */ + if ((ap & 1) == 0) { + /* Access flag fault. */ + code = (code == 15) ? 6 : 3; + goto do_fault; + } + *prot = simple_ap_to_rw_prot(env, mmu_idx, ap >> 1); + } else { + *prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot); } - *prot = ap_to_rw_prot(env, mmu_idx, ap, domain_prot); if (*prot && !xn) { *prot |= PAGE_EXEC; }