From patchwork Mon Feb 9 22:40:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 438098 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 02D2114012E for ; Tue, 10 Feb 2015 09:44:36 +1100 (AEDT) Received: from localhost ([::1]:35558 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YKx4E-00051c-6L for incoming@patchwork.ozlabs.org; Mon, 09 Feb 2015 17:44:34 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37760) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YKx1O-0008QJ-EW for qemu-devel@nongnu.org; Mon, 09 Feb 2015 17:41:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YKx1N-0005JY-F9 for qemu-devel@nongnu.org; Mon, 09 Feb 2015 17:41:38 -0500 Received: from s16892447.onlinehome-server.info ([82.165.15.123]:41802) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YKx1N-0005JE-9p; Mon, 09 Feb 2015 17:41:37 -0500 Received: from 5ec2dae7.skybroadband.com ([94.194.218.231] helo=kentang.lan) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1YKx1L-0005gQ-Mt; Mon, 09 Feb 2015 22:41:36 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, agraf@suse.de Date: Mon, 9 Feb 2015 22:40:51 +0000 Message-Id: <1423521652-14890-9-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1423521652-14890-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1423521652-14890-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 94.194.218.231 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCHv3 8/9] openpic: switch IRQQueue queue from inline to bitmap X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This is in preparation for using VMSTATE_BITMAP in a followup vmstate migration patch. Signed-off-by: Mark Cave-Ayland --- hw/intc/openpic.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c index 4194cef..2a3144f 100644 --- a/hw/intc/openpic.c +++ b/hw/intc/openpic.c @@ -200,11 +200,13 @@ typedef enum IRQType { IRQ_TYPE_FSLSPECIAL, /* FSL timer/IPI interrupt, edge, no polarity */ } IRQType; +/* Round up to the nearest 64 IRQs so that the queue length + * won't change when moving between 32 and 64 bit hosts. + */ +#define IRQQUEUE_SIZE_BITS ((OPENPIC_MAX_IRQ + 63) & ~63) + typedef struct IRQQueue { - /* Round up to the nearest 64 IRQs so that the queue length - * won't change when moving between 32 and 64 bit hosts. - */ - unsigned long queue[BITS_TO_LONGS((OPENPIC_MAX_IRQ + 63) & ~63)]; + unsigned long *queue; int next; int priority; } IRQQueue; @@ -1291,7 +1293,7 @@ static void openpic_save_IRQ_queue(QEMUFile* f, IRQQueue *q) { unsigned int i; - for (i = 0; i < ARRAY_SIZE(q->queue); i++) { + for (i = 0; i < BITS_TO_LONGS(IRQQUEUE_SIZE_BITS); i++) { /* Always put the lower half of a 64-bit long first, in case we * restore on a 32-bit host. The least significant bits correspond * to lower IRQ numbers in the bitmap. @@ -1345,7 +1347,7 @@ static void openpic_load_IRQ_queue(QEMUFile* f, IRQQueue *q) { unsigned int i; - for (i = 0; i < ARRAY_SIZE(q->queue); i++) { + for (i = 0; i < BITS_TO_LONGS(IRQQUEUE_SIZE_BITS); i++) { unsigned long val; val = qemu_get_be32(f); @@ -1444,12 +1446,14 @@ static void openpic_reset(DeviceState *d) write_IRQreg_idr(opp, i, opp->idr_reset); } /* Initialise IRQ destinations */ - for (i = 0; i < MAX_CPU; i++) { + for (i = 0; i < opp->nb_cpus; i++) { opp->dst[i].ctpr = 15; - memset(&opp->dst[i].raised, 0, sizeof(IRQQueue)); opp->dst[i].raised.next = -1; - memset(&opp->dst[i].servicing, 0, sizeof(IRQQueue)); + opp->dst[i].raised.priority = 0; + bitmap_clear(opp->dst[i].raised.queue, 0, IRQQUEUE_SIZE_BITS); opp->dst[i].servicing.next = -1; + opp->dst[i].servicing.priority = 0; + bitmap_clear(opp->dst[i].servicing.queue, 0, IRQQUEUE_SIZE_BITS); } /* Initialise timers */ for (i = 0; i < OPENPIC_MAX_TMR; i++) { @@ -1629,6 +1633,9 @@ static void openpic_realize(DeviceState *dev, Error **errp) for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { sysbus_init_irq(d, &opp->dst[i].irqs[j]); } + + opp->dst[i].raised.queue = bitmap_new(IRQQUEUE_SIZE_BITS); + opp->dst[i].servicing.queue = bitmap_new(IRQQUEUE_SIZE_BITS); } register_savevm(dev, "openpic", 0, 2,