From patchwork Sat Jan 24 09:21:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 432391 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7EAE31402A0 for ; Sat, 24 Jan 2015 20:24:48 +1100 (AEDT) Received: from localhost ([::1]:34430 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEwxS-0000L6-2L for incoming@patchwork.ozlabs.org; Sat, 24 Jan 2015 04:24:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50734) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEwwq-0007XS-BX for qemu-devel@nongnu.org; Sat, 24 Jan 2015 04:24:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YEwwn-0004bx-GI for qemu-devel@nongnu.org; Sat, 24 Jan 2015 04:24:08 -0500 Received: from szxga03-in.huawei.com ([119.145.14.66]:40127) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEwwm-0004bD-F8 for qemu-devel@nongnu.org; Sat, 24 Jan 2015 04:24:05 -0500 Received: from 172.24.2.119 (EHLO szxeml427-hub.china.huawei.com) ([172.24.2.119]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BAW28220; Sat, 24 Jan 2015 17:23:48 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml427-hub.china.huawei.com (10.82.67.182) with Microsoft SMTP Server id 14.3.158.1; Sat, 24 Jan 2015 17:23:38 +0800 From: Shannon Zhao To: , , , , , , , , , Date: Sat, 24 Jan 2015 17:21:19 +0800 Message-ID: <1422091280-14532-11-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1422091280-14532-1-git-send-email-zhaoshenglong@huawei.com> References: <1422091280-14532-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020206.54C364A5.005D, ss=1, re=0.001, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 409550503a31d1727fc909af78d3344c X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.66 Cc: wanghaibin.wang@huawei.com, hangaohuai@huawei.com, peter.huangpeng@huawei.com, zhaoshenglong@huawei.com Subject: [Qemu-devel] [RFC PATCH 10/11] hw/arm/virt-acpi-build: Generation of DSDT table for virt devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org DSDT consists of the usual common table header plus a definition block in AML encoding which describes all devices in the platform. After initializing DSDT with header information the namespace is created which is followed by the device encodings. The devices are described using the Resource Template for the 32-Bit Fixed Memory Range and the Extended Interrupt Descriptors. The following devices are included in the DSDT: - CPUs - UART - RTC - NAND Flash - virtio-mmio Signed-off-by: Shannon Zhao --- hw/arm/virt-acpi-build.c | 120 ++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 120 insertions(+), 0 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index de1f307..5c76ca2 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -98,6 +98,111 @@ static inline void acpi_add_table(GArray *table_offsets, GArray *table_data) g_array_append_val(table_offsets, offset); } +static void acpi_dsdt_add_cpus(AcpiAml *scope, int smp_cpus) +{ + AcpiAml dev, crs; + int i; + char name[5]; + for (i = 0; i < smp_cpus; i++) { + snprintf(name, 5, "CPU%u", i); + dev = acpi_device("%s", name); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("ACPI007"))); + aml_append(&dev, acpi_name_decl("_UID", acpi_int(i))); + crs = acpi_resource_template(); + aml_append(&dev, acpi_name_decl("_CRS", crs)); + aml_append(scope, dev); + } +} + +static void acpi_dsdt_add_uart(AcpiAml *scope, const hwaddr *uart_addr, + const int *uart_irq) +{ + AcpiAml dev, crs; + + dev = acpi_device("COM0"); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("ARMH0011"))); + aml_append(&dev, acpi_name_decl("_UID", acpi_int(0))); + + crs = acpi_resource_template(); + aml_append(&crs, + acpi_fixed_memory32(uart_addr[0], uart_addr[1], 0x01)); + aml_append(&crs, + acpi_extended_irq(0x01, *uart_irq + 32)); + aml_append(&dev, acpi_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +static void acpi_dsdt_add_rtc(AcpiAml *scope, const hwaddr *rtc_addr, + const int *rtc_irq) +{ + AcpiAml dev, crs; + + dev = acpi_device("RTC0"); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("LNRO0013"))); + aml_append(&dev, acpi_name_decl("_UID", acpi_int(0))); + + crs = acpi_resource_template(); + aml_append(&crs, + acpi_fixed_memory32(rtc_addr[0], rtc_addr[1], 0x01)); + aml_append(&crs, + acpi_extended_irq(0x01, *rtc_irq + 32)); + aml_append(&dev, acpi_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +static void acpi_dsdt_add_flash(AcpiAml *scope, const hwaddr *flash_addr) +{ + AcpiAml dev, crs; + hwaddr base = flash_addr[0]; + hwaddr size = flash_addr[1]; + + dev = acpi_device("FLS0"); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("LNRO0015"))); + aml_append(&dev, acpi_name_decl("_UID", acpi_int(0))); + + crs = acpi_resource_template(); + aml_append(&crs, + acpi_fixed_memory32(base, size, 0x01)); + aml_append(&dev, acpi_name_decl("_CRS", crs)); + aml_append(scope, dev); + + dev = acpi_device("FLS1"); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("LNRO0015"))); + aml_append(&dev, acpi_name_decl("_UID", acpi_int(1))); + crs = acpi_resource_template(); + aml_append(&crs, + acpi_fixed_memory32(base + size, size, 0x01)); + aml_append(&dev, acpi_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + +static void acpi_dsdt_add_virtio(AcpiAml *scope, const hwaddr *mmio_addrs, + const int *mmio_irq, int num) +{ + AcpiAml dev, crs; + hwaddr base = mmio_addrs[0]; + hwaddr size = mmio_addrs[1]; + int irq = *mmio_irq + 32; + int i; + char name[5]; + + for (i = 0; i < num; i++) { + snprintf(name, 5, "VR%02u", i); + dev = acpi_device("%s", name); + aml_append(&dev, acpi_name_decl("_HID", acpi_string("LNRO0005"))); + aml_append(&dev, acpi_name_decl("_UID", acpi_int(i))); + + crs = acpi_resource_template(); + aml_append(&crs, + acpi_fixed_memory32(base, size, 0x01)); + aml_append(&crs, + acpi_extended_irq(0x01, irq + i)); + aml_append(&dev, acpi_name_decl("_CRS", crs)); + aml_append(scope, dev); + base += size; + } +} + /* RSDP */ static GArray * build_rsdp(GArray *rsdp_table, GArray *linker, uint64_t xsdt) @@ -260,6 +365,21 @@ build_facs(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) static void build_dsdt(AcpiAml *table_aml, GArray *linker, VirtGuestInfo *guest_info) { + AcpiAml scope, dsdt; + const struct acpi_dsdt_info *info = guest_info->dsdt_info; + + dsdt = acpi_def_block("DSDT", 1, ACPI_VIRT_QEMU_STR_4, + ACPI_VIRT_MACH_STR_8, 1); + scope = acpi_scope("\\_SB"); + acpi_dsdt_add_cpus(&scope, guest_info->nb_cpus); + acpi_dsdt_add_uart(&scope, info->uart_addr, info->uart_irq); + acpi_dsdt_add_rtc(&scope, info->rtc_addr, info->rtc_irq); + acpi_dsdt_add_flash(&scope, info->flash_addr); + acpi_dsdt_add_virtio(&scope, info->virtio_mmio_addr, + info->virtio_mmio_irq, info->virtio_mmio_num); + + aml_append(&dsdt, scope); + aml_append(table_aml, dsdt); } typedef