From patchwork Wed Jan 7 15:20:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 426258 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id BC4EC1400B7 for ; Thu, 8 Jan 2015 02:25:54 +1100 (AEDT) Received: from localhost ([::1]:41178 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y8sUa-0006S8-2B for incoming@patchwork.ozlabs.org; Wed, 07 Jan 2015 10:25:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40003) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y8sPp-0005wD-Ps for qemu-devel@nongnu.org; Wed, 07 Jan 2015 10:21:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Y8sPk-0003Dc-7L for qemu-devel@nongnu.org; Wed, 07 Jan 2015 10:20:57 -0500 Received: from cantor2.suse.de ([195.135.220.15]:37882 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Y8sPj-0003C8-KU; Wed, 07 Jan 2015 10:20:51 -0500 Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id E48DDADC9; Wed, 7 Jan 2015 15:20:50 +0000 (UTC) From: Alexander Graf To: qemu-ppc@nongnu.org Date: Wed, 7 Jan 2015 16:20:40 +0100 Message-Id: <1420644048-16919-30-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.8.1.4 In-Reply-To: <1420644048-16919-1-git-send-email-agraf@suse.de> References: <1420644048-16919-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] X-Received-From: 195.135.220.15 Cc: peter.maydell@linaro.org, Amit Singh Tomar , qemu-devel@nongnu.org Subject: [Qemu-devel] [PULL 29/37] PPC: e500: Fix GPIO controller interrupt number X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Amit Tomar The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a problem because IRQ 43 is occupied by the I2C controller which we want to implement next, so we'd have a conflict on that IRQ number. Move the GPIO controller to IRQ 47 where it belongs. Signed-off-by: Amit Singh Tomar Signed-off-by: Alexander Graf --- hw/ppc/e500.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index a2e60b4..7e17d18 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -60,7 +60,7 @@ #define MPC8544_PCI_REGS_SIZE 0x1000ULL #define MPC8544_UTIL_OFFSET 0xe0000ULL #define MPC8XXX_GPIO_OFFSET 0x000FF000ULL -#define MPC8XXX_GPIO_IRQ 43 +#define MPC8XXX_GPIO_IRQ 47 struct boot_info {