From patchwork Fri Sep 5 12:24:53 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 386332 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 877CD140082 for ; Fri, 5 Sep 2014 22:25:58 +1000 (EST) Received: from localhost ([::1]:57477 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPsaS-0000Xb-Lu for incoming@patchwork.ozlabs.org; Fri, 05 Sep 2014 08:25:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54747) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPsZi-0008F9-JB for qemu-devel@nongnu.org; Fri, 05 Sep 2014 08:25:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XPsZc-0006GP-IJ for qemu-devel@nongnu.org; Fri, 05 Sep 2014 08:25:10 -0400 Received: from mail-we0-f182.google.com ([74.125.82.182]:51062) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPsZc-0006Eu-C6 for qemu-devel@nongnu.org; Fri, 05 Sep 2014 08:25:04 -0400 Received: by mail-we0-f182.google.com with SMTP id w62so11735786wes.41 for ; Fri, 05 Sep 2014 05:25:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=c0zMotP6hYRgOiVVP8fuTid6cyypfGALnav1xUERjvo=; b=NFNvvCadsYJOgYj22Qf0EtYNpMlczBujym1dR9GQ3LRVBxxz8XKMjKCrzgg59JIfwU K/eOfFAWeqwitJb7zNc65QkvZu3roL6pzKa7Syo1HVndDoFpP9fJXVOdQEHWfY3VQJeM KlgQS04yTfSW1GH/0Kk70Op4h6MmmIeDP/Sn371ev+xJFn3Lbf7YIvkGxrwPDR9UlBAP SUlp3iuSqTsKoUvbdguOwH3aY+BWwYgndNHzLUjjgpI1g92CO2S9kfDYx62AI0/lyqfN xPc0c8bbBxQPmqM6s0bRkreR336Xy7EjWJx10kJQWJzunuNiBHIKRwVXsJciNDanprzK zW4g== X-Gm-Message-State: ALoCoQlIAVd99Q1PWfcI2khAhnFffvefLS6eS9f04vLREi+TnYcnVZZ3zz6+dGSSXPyMCbywo1CZ X-Received: by 10.194.209.205 with SMTP id mo13mr14422709wjc.122.1409919903513; Fri, 05 Sep 2014 05:25:03 -0700 (PDT) Received: from ards-macbook-pro.local (cag06-7-83-153-85-71.fbx.proxad.net. [83.153.85.71]) by mx.google.com with ESMTPSA id mv14sm1807558wic.20.2014.09.05.05.25.02 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 05 Sep 2014 05:25:02 -0700 (PDT) From: Ard Biesheuvel To: peter.maydell@linaro.org, christoffer.dall@linaro.org, qemu-devel@nongnu.org Date: Fri, 5 Sep 2014 14:24:53 +0200 Message-Id: <1409919897-360-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1409919897-360-1-git-send-email-ard.biesheuvel@linaro.org> References: <1409919897-360-1-git-send-email-ard.biesheuvel@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 74.125.82.182 Cc: Rob Herring , Ard Biesheuvel Subject: [Qemu-devel] [PATCH v3 2/6] target-arm: do not set do_interrupt handler for AArch64 user mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Rob Herring User mode emulation should never get interrupts and thus should not use the system emulation exception handler function. Remove the reference, and '#ifndef USER_MODE_ONLY' the function itself as well, so that we can add system mode only functionality to it. Signed-off-by: Rob Herring Signed-off-by: Ard Biesheuvel --- target-arm/cpu64.c | 2 ++ target-arm/helper-a64.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index aa42803959be..9f88b9f4eea0 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -196,7 +196,9 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data) { CPUClass *cc = CPU_CLASS(oc); +#if !defined(CONFIG_USER_ONLY) cc->do_interrupt = aarch64_cpu_do_interrupt; +#endif cc->set_pc = aarch64_cpu_set_pc; cc->gdb_read_register = aarch64_cpu_gdb_read_register; cc->gdb_write_register = aarch64_cpu_gdb_write_register; diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 2e9ef64786ae..89b913ee9396 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -438,6 +438,8 @@ uint64_t HELPER(crc32c_64)(uint64_t acc, uint64_t val, uint32_t bytes) return crc32c(acc, buf, bytes) ^ 0xffffffff; } +#if !defined(CONFIG_USER_ONLY) + /* Handle a CPU exception. */ void aarch64_cpu_do_interrupt(CPUState *cs) { @@ -512,3 +514,4 @@ void aarch64_cpu_do_interrupt(CPUState *cs) env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; } +#endif