From patchwork Thu Sep 4 18:01:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: cmchao X-Patchwork-Id: 385993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CF1B1400F0 for ; Fri, 5 Sep 2014 05:41:56 +1000 (EST) Received: from localhost ([::1]:53802 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPcuo-0000N1-9Y for incoming@patchwork.ozlabs.org; Thu, 04 Sep 2014 15:41:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52196) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPbLk-0007cB-9p for qemu-devel@nongnu.org; Thu, 04 Sep 2014 14:01:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XPbLb-0003d4-9k for qemu-devel@nongnu.org; Thu, 04 Sep 2014 14:01:36 -0400 Received: from mail-pd0-x22e.google.com ([2607:f8b0:400e:c02::22e]:42593) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XPbLb-0003cQ-3d for qemu-devel@nongnu.org; Thu, 04 Sep 2014 14:01:27 -0400 Received: by mail-pd0-f174.google.com with SMTP id v10so762435pde.5 for ; Thu, 04 Sep 2014 11:01:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xOJu3PkgftQtrpMAS5a1ej9v3GdrruR2zaL+9pDkImc=; b=stNYzjnYqLFxq3XuMc8D52zvEk64usjh0LuYSh0UA0RA3uuStSfsch/3fjXLOZAQsw uwb2rJqqeVZ4S3LV9mOrrbFucW6i4rRll6oqyAbsGZspavm7Wp+QQEN8vnlh/jp1whu6 VMHEnxv004BpHikm8DllytyTuqtzqUukDmN8yQHfBaM3JzwMM2lHAq/Z8QoTZME0pw2y XKI7Jbyqvs82CjRR1kpOOFnIP+k32b12iOYidVilgzckHHeKyFVTUeZTzjULmigILL/i qyPQb/D48pSJ8ASag3XCH6EdzMalYwG1sQAtywbOFWPM/FV0ccw+XuJslIzJhBp+fy73 7yew== X-Received: by 10.70.129.204 with SMTP id ny12mr5386404pdb.114.1409853684898; Thu, 04 Sep 2014 11:01:24 -0700 (PDT) Received: from softpapa.mtl.marvell.com (118-167-154-181.dynamic.hinet.net. [118.167.154.181]) by mx.google.com with ESMTPSA id xu4sm2277017pab.30.2014.09.04.11.01.22 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 04 Sep 2014 11:01:23 -0700 (PDT) From: Chih-Min Chao To: qemu-devel@nongnu.org Date: Fri, 5 Sep 2014 02:01:16 +0800 Message-Id: <1409853677-10966-2-git-send-email-cmchao@gmail.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1409853677-10966-1-git-send-email-cmchao@gmail.com> References: <1409853677-10966-1-git-send-email-cmchao@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:400e:c02::22e X-Mailman-Approved-At: Thu, 04 Sep 2014 15:41:09 -0400 Cc: peter.maydell@linaro.org, Chih-Min Chao Subject: [Qemu-devel] [PATCH 1/2] target-arm : make parameter of feature/status checking function const X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org CPUARMState is one of parameter used by is_a64 arm_feature arm_el_is_aa64 They only read it without any side effect and shold be changed to const parameter Signed-off-by: Chih-Min Chao --- target-arm/cpu.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 51bedc8..d7f1776 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -340,7 +340,7 @@ ARMCPU *cpu_arm_init(const char *cpu_model); int cpu_arm_exec(CPUARMState *s); uint32_t do_arm_semihosting(CPUARMState *env); -static inline bool is_a64(CPUARMState *env) +static inline bool is_a64(const CPUARMState *env) { return env->aarch64; } @@ -677,13 +677,13 @@ enum arm_features { ARM_FEATURE_V8_PMULL, /* implements PMULL part of v8 Crypto Extensions */ }; -static inline int arm_feature(CPUARMState *env, int feature) +static inline int arm_feature(const CPUARMState *env, int feature) { return (env->features & (1ULL << feature)) != 0; } /* Return true if the specified exception level is running in AArch64 state. */ -static inline bool arm_el_is_aa64(CPUARMState *env, int el) +static inline bool arm_el_is_aa64(const CPUARMState *env, int el) { /* We don't currently support EL2 or EL3, and this isn't valid for EL0 * (if we're in EL0, is_a64() is what you want, and if we're not in EL0