From patchwork Fri Aug 8 16:23:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 378258 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id C248A140111 for ; Sat, 9 Aug 2014 02:24:53 +1000 (EST) Received: from localhost ([::1]:51957 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XFmyJ-0001Tc-Tk for incoming@patchwork.ozlabs.org; Fri, 08 Aug 2014 12:24:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35858) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XFmxb-0000M8-5s for qemu-devel@nongnu.org; Fri, 08 Aug 2014 12:24:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XFmxU-0004xL-Nd for qemu-devel@nongnu.org; Fri, 08 Aug 2014 12:24:07 -0400 Received: from s16892447.onlinehome-server.info ([82.165.15.123]:55849) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XFmxU-0004wF-FC for qemu-devel@nongnu.org; Fri, 08 Aug 2014 12:24:00 -0400 Received: from 5ec2b775.skybroadband.com ([94.194.183.117] helo=kentang.lan) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1XFmxN-0001Zx-25; Fri, 08 Aug 2014 17:23:54 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, kwolf@redhat.com, stefanha@redhat.com Date: Fri, 8 Aug 2014 17:23:33 +0100 Message-Id: <1407515016-26273-3-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1407515016-26273-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1407515016-26273-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 94.194.183.117 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 2/5] cmd646: synchronise DMA interrupt status with UDMA interrupt status X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Make sure that the standard DMA interrupt status bits reflect any changes made to the UDMA interrupt status bits. The CMD646U2 datasheet claims that these bits are equivalent, and they must be synchronised for guests that manipulate both registers. Signed-off-by: Mark Cave-Ayland --- hw/ide/cmd646.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c index d8395ef..c3c6c53 100644 --- a/hw/ide/cmd646.c +++ b/hw/ide/cmd646.c @@ -33,9 +33,13 @@ #include /* CMD646 specific */ +#define CFR 0x50 +#define CFR_INTR_CH0 0x04 #define CNTRL 0x51 #define CNTRL_EN_CH0 0x04 #define CNTRL_EN_CH1 0x08 +#define ARTTIM23 0x57 +#define ARTTIM23_INTR_CH1 0x10 #define MRDMODE 0x71 #define MRDMODE_INTR_CH0 0x04 #define MRDMODE_INTR_CH1 0x08 @@ -126,6 +130,22 @@ static void setup_cmd646_bar(PCIIDEState *d, int bus_num) "cmd646-data", 8); } +static void cmd646_update_dma_interrupts(PCIDevice *pd) +{ + /* Sync DMA interrupt status from UDMA interrupt status */ + if (pd->config[MRDMODE] & MRDMODE_INTR_CH0) { + pd->config[CFR] |= CFR_INTR_CH0; + } else { + pd->config[CFR] &= ~CFR_INTR_CH0; + } + + if (pd->config[MRDMODE] & MRDMODE_INTR_CH1) { + pd->config[ARTTIM23] |= ARTTIM23_INTR_CH1; + } else { + pd->config[ARTTIM23] &= ~ARTTIM23_INTR_CH1; + } +} + static uint64_t bmdma_read(void *opaque, hwaddr addr, unsigned size) { @@ -184,6 +204,7 @@ static void bmdma_write(void *opaque, hwaddr addr, case 1: pci_dev->config[MRDMODE] = (pci_dev->config[MRDMODE] & ~0x30) | (val & 0x30); + cmd646_update_dma_interrupts(pci_dev); cmd646_update_irq(bm->pci_dev); break; case 2: @@ -249,6 +270,7 @@ static void cmd646_set_irq(void *opaque, int channel, int level) } else { pd->config[MRDMODE] &= ~irq_mask; } + cmd646_update_dma_interrupts(pd); cmd646_update_irq(d); }