From patchwork Thu Jun 19 13:52:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Apfelbaum X-Patchwork-Id: 361874 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 43BB9140076 for ; Thu, 19 Jun 2014 23:53:10 +1000 (EST) Received: from localhost ([::1]:35675 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wxcm4-0008GX-Hv for incoming@patchwork.ozlabs.org; Thu, 19 Jun 2014 09:53:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45493) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WxclR-0007Fs-S7 for qemu-devel@nongnu.org; Thu, 19 Jun 2014 09:52:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WxclL-00018r-05 for qemu-devel@nongnu.org; Thu, 19 Jun 2014 09:52:29 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41653) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WxclK-00017H-O8 for qemu-devel@nongnu.org; Thu, 19 Jun 2014 09:52:22 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id s5JDqKVU025988 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 19 Jun 2014 09:52:20 -0400 Received: from localhost.localdomain.com (vpn1-5-49.ams2.redhat.com [10.36.5.49]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id s5JDqHJl021936; Thu, 19 Jun 2014 09:52:18 -0400 From: Marcel Apfelbaum To: seabios@seabios.org Date: Thu, 19 Jun 2014 16:52:17 +0300 Message-Id: <1403185937-19515-1-git-send-email-marcel.a@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 209.132.183.28 Cc: kevin@koconnor.net, qemu-devel@nongnu.org, mst@redhat.com Subject: [Qemu-devel] [PATCH] hw/pci: reserve IO and mem for pci express downstream ports with no devices attached X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org commit c6e298e1f12e0f4ca02b6da5e42919ae055f6830 hw/pci: reserve IO and mem for pci-2-pci bridges with no devices attached introduced support for hot-plugging devices behind pci-2-pci bridges. Extend hotplug support also for pci express downstream ports. Signed-off-by: Marcel Apfelbaum --- src/fw/pciinit.c | 23 +++++++++++++++++++++-- src/hw/pci_regs.h | 2 ++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 0ad548f..edb3fe9 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -636,6 +636,25 @@ pci_region_create_entry(struct pci_bus *bus, struct pci_device *dev, return entry; } +static int pci_bus_hotplug_support(struct pci_bus *bus) +{ + u8 shpc_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_SHPC); + u8 pcie_cap = pci_find_capability(bus->bus_dev, PCI_CAP_ID_EXP); + int downstream_port = 0; + int slot_implemented = 0; + + if (pcie_cap) { + u16 pcie_flags = pci_config_readw(bus->bus_dev->bdf, + pcie_cap + PCI_EXP_FLAGS); + u16 port_type = ((pcie_flags & PCI_EXP_FLAGS_TYPE) >> + PCI_EXP_FLAGS_TYPE_SHIFT) & 0xf; + downstream_port = (port_type == PCI_EXP_TYPE_DOWNSTREAM) || + (port_type == PCI_EXP_TYPE_ROOT_PORT); + slot_implemented = !!(pcie_flags & PCI_EXP_FLAGS_SLOT); + } + return shpc_cap || (downstream_port && slot_implemented); +} + static int pci_bios_check_devices(struct pci_bus *busses) { dprintf(1, "PCI: check devices\n"); @@ -678,7 +697,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) continue; struct pci_bus *parent = &busses[pci_bdf_to_bus(s->bus_dev->bdf)]; int type; - u8 shpc_cap = pci_find_capability(s->bus_dev, PCI_CAP_ID_SHPC); + int hotplug_support = pci_bus_hotplug_support(s); for (type = 0; type < PCI_REGION_TYPE_COUNT; type++) { u64 align = (type == PCI_REGION_TYPE_IO) ? PCI_BRIDGE_IO_MIN : PCI_BRIDGE_MEM_MIN; @@ -687,7 +706,7 @@ static int pci_bios_check_devices(struct pci_bus *busses) if (pci_region_align(&s->r[type]) > align) align = pci_region_align(&s->r[type]); u64 sum = pci_region_sum(&s->r[type]); - if (!sum && shpc_cap) + if (!sum && hotplug_support) sum = align; /* reserve min size for hot-plug */ u64 size = ALIGN(sum, align); int is64 = pci_bios_bridge_region_is64(&s->r[type], diff --git a/src/hw/pci_regs.h b/src/hw/pci_regs.h index e5effd4..6a71569 100644 --- a/src/hw/pci_regs.h +++ b/src/hw/pci_regs.h @@ -426,6 +426,8 @@ #define PCI_EXP_DEVCTL2 40 /* Device Control 2 */ #define PCI_EXP_DEVCTL2_ARI 0x20 /* Alternative Routing-ID */ +#define PCI_EXP_FLAGS_TYPE_SHIFT 4 + /* Extended Capabilities (PCI-X 2.0 and Express) */ #define PCI_EXT_CAP_ID(header) (header & 0x0000ffff) #define PCI_EXT_CAP_VER(header) ((header >> 16) & 0xf)