From patchwork Wed May 28 07:35:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 353251 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 973DA14007E for ; Wed, 28 May 2014 17:39:16 +1000 (EST) Received: from localhost ([::1]:39938 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpYSA-0001eK-7n for incoming@patchwork.ozlabs.org; Wed, 28 May 2014 03:39:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55991) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpYRc-0000kP-8Y for qemu-devel@nongnu.org; Wed, 28 May 2014 03:38:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WpYRV-0006os-Su for qemu-devel@nongnu.org; Wed, 28 May 2014 03:38:40 -0400 Received: from s16892447.onlinehome-server.info ([82.165.15.123]:43801) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpYRV-0006n4-N4 for qemu-devel@nongnu.org; Wed, 28 May 2014 03:38:33 -0400 Received: from 4e56a431.skybroadband.com ([78.86.164.49] helo=kentang.lan) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1WpYRJ-0007iN-Sp; Wed, 28 May 2014 08:38:27 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, blauwirbel@gmail.com, atar4qemu@gmail.com Date: Wed, 28 May 2014 08:35:41 +0100 Message-Id: <1401262543-17544-3-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1401262543-17544-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1401262543-17544-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 78.86.164.49 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 2/4] apb: fix IOMMU register sizes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org According to the referenced documentation, the IOMMU has 3 64-bit registers consisting of a control register, base register and flush register. Signed-off-by: Mark Cave-Ayland --- hw/pci-host/apb.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index bea7092..e25791f 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -71,7 +71,7 @@ do { printf("APB: " fmt , ## __VA_ARGS__); } while (0) #define NO_IRQ_REQUEST (MAX_IVEC + 1) typedef struct IOMMUState { - uint32_t regs[4]; + uint32_t regs[6]; } IOMMUState; #define TYPE_APB "pbm" @@ -157,11 +157,9 @@ static void apb_config_writel (void *opaque, hwaddr addr, case 0x30 ... 0x4f: /* DMA error registers */ /* XXX: not implemented yet */ break; - case 0x200 ... 0x20b: /* IOMMU */ + case 0x200 ... 0x217: /* IOMMU */ is->regs[(addr & 0xf) >> 2] = val; break; - case 0x20c ... 0x3ff: /* IOMMU flush */ - break; case 0xc00 ... 0xc3f: /* PCI interrupt control */ if (addr & 4) { unsigned int ino = (addr & 0x3f) >> 3; @@ -241,12 +239,9 @@ static uint64_t apb_config_readl (void *opaque, val = 0; /* XXX: not implemented yet */ break; - case 0x200 ... 0x20b: /* IOMMU */ + case 0x200 ... 0x217: /* IOMMU */ val = is->regs[(addr & 0xf) >> 2]; break; - case 0x20c ... 0x3ff: /* IOMMU flush */ - val = 0; - break; case 0xc00 ... 0xc3f: /* PCI interrupt control */ if (addr & 4) { val = s->pci_irq_map[(addr & 0x3f) >> 3];