From patchwork Wed May 28 07:35:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 353250 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 90A7A14007E for ; Wed, 28 May 2014 17:39:12 +1000 (EST) Received: from localhost ([::1]:39936 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpYS6-0001VK-78 for incoming@patchwork.ozlabs.org; Wed, 28 May 2014 03:39:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55966) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpYRZ-0000kM-0G for qemu-devel@nongnu.org; Wed, 28 May 2014 03:38:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WpYRS-0006oL-O7 for qemu-devel@nongnu.org; Wed, 28 May 2014 03:38:36 -0400 Received: from s16892447.onlinehome-server.info ([82.165.15.123]:43799) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WpYRS-0006mU-ID for qemu-devel@nongnu.org; Wed, 28 May 2014 03:38:30 -0400 Received: from 4e56a431.skybroadband.com ([78.86.164.49] helo=kentang.lan) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1WpYRE-0007iN-Rj; Wed, 28 May 2014 08:38:21 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, blauwirbel@gmail.com, atar4qemu@gmail.com Date: Wed, 28 May 2014 08:35:40 +0100 Message-Id: <1401262543-17544-2-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1401262543-17544-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1401262543-17544-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 78.86.164.49 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 1/4] apb: Move IOMMU registers into a separate IOMMUState struct X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Mark Cave-Ayland --- hw/pci-host/apb.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index 252caef..bea7092 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -70,6 +70,10 @@ do { printf("APB: " fmt , ## __VA_ARGS__); } while (0) #define MAX_IVEC 0x40 #define NO_IRQ_REQUEST (MAX_IVEC + 1) +typedef struct IOMMUState { + uint32_t regs[4]; +} IOMMUState; + #define TYPE_APB "pbm" #define APB_DEVICE(obj) \ @@ -83,7 +87,7 @@ typedef struct APBState { MemoryRegion pci_mmio; MemoryRegion pci_ioport; uint64_t pci_irq_in; - uint32_t iommu[4]; + IOMMUState iommu; uint32_t pci_control[16]; uint32_t pci_irq_map[8]; uint32_t obio_irq_map[32]; @@ -145,6 +149,7 @@ static void apb_config_writel (void *opaque, hwaddr addr, uint64_t val, unsigned size) { APBState *s = opaque; + IOMMUState *is = &s->iommu; APB_DPRINTF("%s: addr " TARGET_FMT_plx " val %" PRIx64 "\n", __func__, addr, val); @@ -153,7 +158,7 @@ static void apb_config_writel (void *opaque, hwaddr addr, /* XXX: not implemented yet */ break; case 0x200 ... 0x20b: /* IOMMU */ - s->iommu[(addr & 0xf) >> 2] = val; + is->regs[(addr & 0xf) >> 2] = val; break; case 0x20c ... 0x3ff: /* IOMMU flush */ break; @@ -228,6 +233,7 @@ static uint64_t apb_config_readl (void *opaque, hwaddr addr, unsigned size) { APBState *s = opaque; + IOMMUState *is = &s->iommu; uint32_t val; switch (addr & 0xffff) { @@ -236,7 +242,7 @@ static uint64_t apb_config_readl (void *opaque, /* XXX: not implemented yet */ break; case 0x200 ... 0x20b: /* IOMMU */ - val = s->iommu[(addr & 0xf) >> 2]; + val = is->regs[(addr & 0xf) >> 2]; break; case 0x20c ... 0x3ff: /* IOMMU flush */ val = 0; @@ -390,6 +396,7 @@ PCIBus *pci_apb_init(hwaddr special_base, SysBusDevice *s; PCIHostState *phb; APBState *d; + IOMMUState *is; PCIDevice *pci_dev; PCIBridge *br; @@ -420,6 +427,10 @@ PCIBus *pci_apb_init(hwaddr special_base, pci_create_simple(phb->bus, 0, "pbm-pci"); + /* APB IOMMU */ + is = &d->iommu; + memset(is, 0, sizeof(IOMMUState)); + /* APB secondary busses */ pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true, "pbm-bridge");