From patchwork Mon May 26 09:36:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tiejun Chen X-Patchwork-Id: 352458 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A58DF14009E for ; Mon, 26 May 2014 19:38:41 +1000 (EST) Received: from localhost ([::1]:55737 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WorMd-00087a-KB for incoming@patchwork.ozlabs.org; Mon, 26 May 2014 05:38:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46995) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WorLw-0006jA-To for qemu-devel@nongnu.org; Mon, 26 May 2014 05:38:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WorLr-0003lc-R1 for qemu-devel@nongnu.org; Mon, 26 May 2014 05:37:56 -0400 Received: from mga14.intel.com ([192.55.52.115]:48106) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WorLr-0003kn-DL for qemu-devel@nongnu.org; Mon, 26 May 2014 05:37:51 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 26 May 2014 02:33:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.98,911,1392192000"; d="scan'208";a="537628413" Received: from tchen0-linux.bj.intel.com ([10.238.154.58]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2014 02:37:48 -0700 From: Tiejun Chen To: nthony.perard@citrix.com, stefano.stabellini@eu.citrix.com, mst@redhat.com, Kelly.Zytaruk@amd.com Date: Mon, 26 May 2014 17:36:32 +0800 Message-Id: <1401096995-4198-3-git-send-email-tiejun.chen@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1401096995-4198-1-git-send-email-tiejun.chen@intel.com> References: <1401096995-4198-1-git-send-email-tiejun.chen@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Cc: peter.maydell@linaro.org, xen-devel@lists.xensource.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, nthony@codemonkey.ws, yang.z.zhang@intel.com Subject: [Qemu-devel] [v3][PATCH 2/5] xen, gfx passthrough: create intel isa bridge X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org ISA bridge is needed since Intel gfx drive will probe it instead of Dev31:Fun0 to make graphics device passthrough work easy for VMM, that only need to expose ISA bridge to let driver know the real hardware underneath. The original patch is from Allen Kay [allen.m.kay@intel.com] Signed-off-by: Yang Zhang Signed-off-by: Tiejun Chen Cc: Allen Kay --- v3: * Fix some typos. * Improve some return paths. v2: * Nothing is changed. hw/xen/xen_pt_graphics.c | 63 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/hw/xen/xen_pt_graphics.c b/hw/xen/xen_pt_graphics.c index e63bd6f..51b174f 100644 --- a/hw/xen/xen_pt_graphics.c +++ b/hw/xen/xen_pt_graphics.c @@ -230,3 +230,66 @@ out: g_free(bios); return rc; } + +static uint32_t isa_bridge_read_config(PCIDevice *d, uint32_t addr, int len) +{ + return pci_default_read_config(d, addr, len); +} + +static void isa_bridge_write_config(PCIDevice *d, uint32_t addr, uint32_t v, + int len) +{ + pci_default_write_config(d, addr, v, len); + + return; +} + +static void isa_bridge_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->config_read = isa_bridge_read_config; + k->config_write = isa_bridge_write_config; + + return; +}; + +typedef struct { + PCIDevice dev; +} ISABridgeState; + +static TypeInfo isa_bridge_info = { + .name = "intel-pch-isa-bridge", + .parent = TYPE_PCI_DEVICE, + .instance_size = sizeof(ISABridgeState), + .class_init = isa_bridge_class_init, +}; + +static void xen_pt_graphics_register_types(void) +{ + type_register_static(&isa_bridge_info); +} + +type_init(xen_pt_graphics_register_types) + +static int create_pch_isa_bridge(PCIBus *bus, XenHostPCIDevice *hdev) +{ + struct PCIDevice *dev; + + char rid; + + dev = pci_create(bus, PCI_DEVFN(0x1f, 0), "intel-pch-isa-bridge"); + + qdev_init_nofail(&dev->qdev); + + pci_config_set_vendor_id(dev->config, hdev->vendor_id); + pci_config_set_device_id(dev->config, hdev->device_id); + + xen_host_pci_get_block(hdev, PCI_REVISION_ID, (uint8_t *)&rid, 1); + + pci_config_set_revision(dev->config, rid); + pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_ISA); + + XEN_PT_LOG(dev, "Intel PCH ISA bridge created.\n"); + return 0; +}